cfg);
}
+static void dpu_hw_wb_setup_qos_lut_v13(struct dpu_hw_wb *ctx,
+ struct dpu_hw_qos_cfg *cfg)
+{
+ if (!ctx || !cfg)
+ return;
+
+ dpu_hw_setup_qos_lut_v13(&ctx->hw, cfg);
+}
+
static void dpu_hw_wb_setup_cdp(struct dpu_hw_wb *ctx,
const struct msm_format *fmt,
bool enable)
if (test_bit(DPU_WB_XY_ROI_OFFSET, &features))
ops->setup_roi = dpu_hw_wb_roi;
- if (test_bit(DPU_WB_QOS, &features))
- ops->setup_qos_lut = dpu_hw_wb_setup_qos_lut;
+ if (test_bit(DPU_WB_QOS, &features)) {
+ if (mdss_rev->core_major_ver >= 13)
+ ops->setup_qos_lut = dpu_hw_wb_setup_qos_lut_v13;
+ else
+ ops->setup_qos_lut = dpu_hw_wb_setup_qos_lut;
+ }
if (test_bit(DPU_WB_CDP, &features))
ops->setup_cdp = dpu_hw_wb_setup_cdp;