arm64: dts: amlogic: a1: align the mmc clock setup

The amlogic MMC driver operate with the assumption that MMC clock
is configured to provide 24MHz. It uses this path for low
rates such as 400kHz.

A1 is particular in the way that is already has the mmc clock set
to 24MHz by forcing the mux to select the board crystal. It works
too, it is just slightly less readable.

Align with what is being done with the other Amlogic platforms.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260114-amlogic-mmc-clocks-followup-v1-2-a999fafbe0aa@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index 27b68ed85c4c29cd024007c2a4461a3717046f07..348411411f3d150c9b9f799ee310feed373b48fe 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
@@ -674,11 +674,12 @@
                                clock-names = "core",
                                              "clkin0",
                                              "clkin1";
-                               assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_SEL2>;
-                               assigned-clock-parents = <&xtal>;
                                resets = <&reset RESET_SD_EMMC_A>;
                                power-domains = <&pwrc PWRC_SD_EMMC_ID>;
                                status = "disabled";
+
+                               assigned-clocks = <&clkc_periphs CLKID_SD_EMMC>;
+                               assigned-clock-rates = <24000000>;
                        };
                };