rockchip: Add support for RK3568 LinkEase EasePi R1

Specification:
- Rockchip RK3568
- 2GB/4GB LPDDR4 RAM
- 16GB on-board eMMC
- 1x M.2 key for 2280 NVMe (PCIe 3.0)
- 1x USB 3.0 Type-A
- 1x USB 2.0 Type-C (for USB flashing)
- 2x 1000 Base-T (native, RTL8211F)
- 2x 2500 Base-T (PCIe, RTL8125B)
- 1x HDMI 2.0 Output
- 12v DC Jack
- 1x Power key connected to PMIC
- 2x LEDs (one static power supplied, one GPIO controlled)

Debug Serial Port: 3.3V TTL, 3-pin 2.54mm pitch connector, 1500000 bauds,
'J7' on board with G/R/T (GND/RX/TX) pins marked

Installation - eMMC:
-Boot official firmware (OpenWRT based)
-Upload sysupgrade.img.gz to /tmp/firmware.bin (with scp or web page)
-Flash to eMMC: sysupgrade -n -p -F /tmp/firmware.bin

Signed-off-by: Liangbin Lian <jjm2473@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20147
(cherry picked from commit 8ca4caacd039bba6d53d3c578fbcf21b6a2fbff2)
[refresh patches upon 24.10 branch]
Link: https://github.com/openwrt/openwrt/pull/20744
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
index 56e0cc2408facd832e0b1a88c631ed8cfbeefb40..02c66b873ebad1f6f88a2cb1597df5900921b7e7 100644 (file)
--- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
+++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
@@ -33,6 +33,9 @@ rockchip_setup_interfaces()
        friendlyarm,nanopi-r6s)
                ucidef_set_interfaces_lan_wan 'eth0 eth2' 'eth1'
                ;;
+       linkease,easepi-r1)
+               ucidef_set_interfaces_lan_wan 'eth1 eth2 eth3' 'eth0'
+               ;;
        sinovoip,rk3568-bpi-r2pro)
                ucidef_set_interfaces_lan_wan 'lan0 lan1 lan2 lan3' 'eth0'
                ;;
@@ -54,6 +57,7 @@ rockchip_setup_macs()
        friendlyarm,nanopc-t6|\
        friendlyarm,nanopi-r2c|\
        friendlyarm,nanopi-r2s|\
+       linkease,easepi-r1|\
        lunzn,fastrhino-r66s)
                wan_mac=$(macaddr_generate_from_mmc_cid mmcblk0)
                lan_mac=$(macaddr_add "$wan_mac" 1)

diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
index d9ca53b7e1115f046f281bfa8407f1a5006583b7..9277dad3e79a4c4e3b554092a7d3d1e0518c49c0 100644 (file)
--- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
+++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
@@ -32,6 +32,7 @@ case "$(board_name)" in
 armsom,sige7|\
 friendlyarm,nanopi-r3s|\
 friendlyarm,nanopi-r5c|\
+linkease,easepi-r1|\
 lunzn,fastrhino-r66s|\
 radxa,e25|\
 sinovoip,rk3568-bpi-r2pro)

diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
index af224bb60866d82cf975edf48d3955f2f6d402e1..07272d244cc12a2a4144734c5753c8d15ff68e6d 100644 (file)
--- a/target/linux/rockchip/image/armv8.mk
+++ b/target/linux/rockchip/image/armv8.mk
@@ -124,6 +124,15 @@ define Device/friendlyarm_nanopi-r6s
 endef
 TARGET_DEVICES += friendlyarm_nanopi-r6s
 
+define Device/linkease_easepi-r1
+  DEVICE_VENDOR := LinkEase
+  DEVICE_MODEL := EasePi R1
+  SOC := rk3568
+  UBOOT_DEVICE_NAME := generic-rk3568
+  DEVICE_PACKAGES := blkdiscard block-mount kmod-button-hotplug kmod-nvme kmod-r8169
+endef
+TARGET_DEVICES += linkease_easepi-r1
+
 define Device/lunzn_fastrhino-r66s
   DEVICE_VENDOR := Lunzn
   DEVICE_MODEL := FastRhino R66S

diff --git a/target/linux/rockchip/patches-6.6/025-v6.19-arm64-dts-rockchip-add-LinkEase-EasePi-R1.patch b/target/linux/rockchip/patches-6.6/025-v6.19-arm64-dts-rockchip-add-LinkEase-EasePi-R1.patch
new file mode 100644 (file)
index 0000000..afd7a82
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/025-v6.19-arm64-dts-rockchip-add-LinkEase-EasePi-R1.patch
@@ -0,0 +1,669 @@
+From deaefeaf3df433d50935b9a85076041040f06d74 Mon Sep 17 00:00:00 2001
+From: Liangbin Lian <jjm2473@gmail.com>
+Date: Tue, 14 Oct 2025 13:12:26 +0800
+Subject: [PATCH] arm64: dts: rockchip: add LinkEase EasePi R1
+
+LinkEase EasePi R1 [1] is a high-performance mini router.
+
+Specification:
+- Rockchip RK3568
+- 2GB/4GB LPDDR4 RAM
+- 16GB on-board eMMC
+- 1x M.2 key for 2280 NVMe (PCIe 3.0)
+- 1x USB 3.0 Type-A
+- 1x USB 2.0 Type-C (for USB flashing)
+- 2x 1000 Base-T (native, RTL8211F)
+- 2x 2500 Base-T (PCIe, RTL8125B)
+- 1x HDMI 2.0 Output
+- 12v DC Jack
+- 1x Power key connected to PMIC
+- 2x LEDs (one static power supplied, one GPIO controlled)
+
+[1] https://doc.linkease.com/zh/guide/easepi-r1/hardware.html
+
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Liangbin Lian <jjm2473@gmail.com>
+Link: https://patch.msgid.link/20251014051226.64255-4-jjm2473@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/Makefile         |   1 +
+ .../boot/dts/rockchip/rk3568-easepi-r1.dts    | 623 ++++++++++++++++++
+ 2 files changed, 624 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-easepi-r1.dts
+
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -91,6 +91,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-so
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-box-demo.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-lubancat-1.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-easepi-r1.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3568-easepi-r1.dts
+@@ -0,0 +1,623 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++
++/dts-v1/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/pinctrl/rockchip.h>
++#include <dt-bindings/soc/rockchip,vop2.h>
++#include "rk3568.dtsi"
++
++/ {
++      model = "LinkEase EasePi R1";
++      compatible = "linkease,easepi-r1", "rockchip,rk3568";
++
++      aliases {
++              ethernet0 = &gmac0;
++              ethernet1 = &gmac1;
++              mmc0 = &sdhci;
++      };
++
++      chosen: chosen {
++              stdout-path = "serial2:1500000n8";
++      };
++
++      adc-keys {
++              compatible = "adc-keys";
++              io-channels = <&saradc 0>;
++              io-channel-names = "buttons";
++              keyup-threshold-microvolt = <1800000>;
++
++              button-recovery {
++                      label = "Recovery";
++                      linux,code = <KEY_VENDOR>;
++                      press-threshold-microvolt = <1750>;
++              };
++      };
++
++      gpio-leds {
++              compatible = "gpio-leds";
++              pinctrl-names = "default";
++              pinctrl-0 = <&status_led_pin>;
++
++              status_led: led-status {
++                      color = <LED_COLOR_ID_GREEN>;
++                      function = LED_FUNCTION_STATUS;
++                      gpios = <&gpio2 RK_PD7 GPIO_ACTIVE_HIGH>;
++                      linux,default-trigger = "heartbeat";
++              };
++      };
++
++      hdmi-con {
++              compatible = "hdmi-connector";
++              type = "a";
++
++              port {
++                      hdmi_con_in: endpoint {
++                              remote-endpoint = <&hdmi_out_con>;
++                      };
++              };
++      };
++
++      dc_12v: regulator-dc-12v {
++              compatible = "regulator-fixed";
++              regulator-name = "dc_12v";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <12000000>;
++              regulator-max-microvolt = <12000000>;
++      };
++
++      vcc5v0_sys: regulator-vcc5v0-sys {
++              compatible = "regulator-fixed";
++              regulator-name = "vcc5v0_sys";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <5000000>;
++              regulator-max-microvolt = <5000000>;
++              vin-supply = <&dc_12v>;
++      };
++
++      vcc3v3_sys: regulator-vcc3v3-sys {
++              compatible = "regulator-fixed";
++              regulator-name = "vcc3v3_sys";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <3300000>;
++              regulator-max-microvolt = <3300000>;
++              vin-supply = <&dc_12v>;
++      };
++
++      pcie30_avdd0v9: regulator-pcie30-avdd0v9 {
++              compatible = "regulator-fixed";
++              regulator-name = "pcie30_avdd0v9";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <900000>;
++              regulator-max-microvolt = <900000>;
++              vin-supply = <&vcc3v3_sys>;
++      };
++
++      pcie30_avdd1v8: regulator-pcie30-avdd1v8 {
++              compatible = "regulator-fixed";
++              regulator-name = "pcie30_avdd1v8";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <1800000>;
++              regulator-max-microvolt = <1800000>;
++              vin-supply = <&vcc3v3_sys>;
++      };
++
++      regulator-vdd0v95-25glan {
++              compatible = "regulator-fixed";
++              enable-active-high;
++              gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&vdd0v95_25glan_en>;
++              regulator-name = "vdd0v95_25glan";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <950000>;
++              regulator-max-microvolt = <950000>;
++              vin-supply = <&vcc3v3_sys>;
++      };
++
++      vcc3v3_nvme: regulator-vcc3v3-nvme {
++              compatible = "regulator-fixed";
++              enable-active-high;
++              gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&vcc3v3_nvme_en>;
++              regulator-name = "vcc3v3_nvme";
++              regulator-min-microvolt = <3300000>;
++              regulator-max-microvolt = <3300000>;
++              vin-supply = <&dc_12v>;
++      };
++
++};
++
++&combphy1 {
++      status = "okay";
++};
++
++&combphy2 {
++      status = "okay";
++};
++
++&cpu0 {
++      cpu-supply = <&vdd_cpu>;
++};
++
++&cpu1 {
++      cpu-supply = <&vdd_cpu>;
++};
++
++&cpu2 {
++      cpu-supply = <&vdd_cpu>;
++};
++
++&cpu3 {
++      cpu-supply = <&vdd_cpu>;
++};
++
++&gmac0 {
++      assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
++      assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
++      assigned-clock-rates = <0>, <125000000>;
++      phy-handle = <&rgmii_phy0>;
++      phy-mode = "rgmii-id";
++      pinctrl-names = "default";
++      pinctrl-0 = <&gmac0_miim
++                   &gmac0_tx_bus2
++                   &gmac0_rx_bus2
++                   &gmac0_rgmii_clk
++                   &gmac0_rgmii_bus>;
++      status = "okay";
++};
++
++&gmac1 {
++      assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
++      assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
++      assigned-clock-rates = <0>, <125000000>;
++      phy-handle = <&rgmii_phy1>;
++      phy-mode = "rgmii-id";
++      pinctrl-names = "default";
++      pinctrl-0 = <&gmac1m1_miim
++                   &gmac1m1_tx_bus2
++                   &gmac1m1_rx_bus2
++                   &gmac1m1_rgmii_clk
++                   &gmac1m1_rgmii_bus>;
++      status = "okay";
++};
++
++&gpu {
++      mali-supply = <&vdd_gpu>;
++      status = "okay";
++};
++
++&hdmi {
++      avdd-0v9-supply = <&vdda0v9_image>;
++      avdd-1v8-supply = <&vcca1v8_image>;
++      status = "okay";
++};
++
++&hdmi_in {
++      hdmi_in_vp0: endpoint {
++              remote-endpoint = <&vp0_out_hdmi>;
++      };
++};
++
++&hdmi_out {
++      hdmi_out_con: endpoint {
++              remote-endpoint = <&hdmi_con_in>;
++      };
++};
++
++&hdmi_sound {
++      status = "okay";
++};
++
++&i2c0 {
++      status = "okay";
++
++      vdd_cpu: regulator@1c {
++              compatible = "tcs,tcs4525";
++              reg = <0x1c>;
++              fcs,suspend-voltage-selector = <1>;
++              regulator-name = "vdd_cpu";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <800000>;
++              regulator-max-microvolt = <1150000>;
++              regulator-ramp-delay = <2300>;
++              vin-supply = <&vcc5v0_sys>;
++
++              regulator-state-mem {
++                      regulator-off-in-suspend;
++              };
++      };
++
++      rk809: pmic@20 {
++              compatible = "rockchip,rk809";
++              reg = <0x20>;
++              interrupt-parent = <&gpio0>;
++              interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
++              #clock-cells = <1>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&pmic_int>;
++              system-power-controller;
++              vcc1-supply = <&vcc3v3_sys>;
++              vcc2-supply = <&vcc3v3_sys>;
++              vcc3-supply = <&vcc3v3_sys>;
++              vcc4-supply = <&vcc3v3_sys>;
++              vcc5-supply = <&vcc3v3_sys>;
++              vcc6-supply = <&vcc3v3_sys>;
++              vcc7-supply = <&vcc3v3_sys>;
++              vcc8-supply = <&vcc3v3_sys>;
++              vcc9-supply = <&vcc3v3_sys>;
++              wakeup-source;
++
++              regulators {
++                      vdd_logic: DCDC_REG1 {
++                              regulator-name = "vdd_logic";
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-initial-mode = <0x2>;
++                              regulator-min-microvolt = <500000>;
++                              regulator-max-microvolt = <1350000>;
++                              regulator-ramp-delay = <6001>;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdd_gpu: DCDC_REG2 {
++                              regulator-name = "vdd_gpu";
++                              regulator-always-on;
++                              regulator-initial-mode = <0x2>;
++                              regulator-min-microvolt = <500000>;
++                              regulator-max-microvolt = <1350000>;
++                              regulator-ramp-delay = <6001>;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcc_ddr: DCDC_REG3 {
++                              regulator-name = "vcc_ddr";
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-initial-mode = <0x2>;
++
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                              };
++                      };
++
++                      vdd_npu: DCDC_REG4 {
++                              regulator-name = "vdd_npu";
++                              regulator-initial-mode = <0x2>;
++                              regulator-min-microvolt = <500000>;
++                              regulator-max-microvolt = <1350000>;
++                              regulator-ramp-delay = <6001>;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcc_1v8: DCDC_REG5 {
++                              regulator-name = "vcc_1v8";
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdda0v9_image: LDO_REG1 {
++                              regulator-name = "vdda0v9_image";
++                              regulator-min-microvolt = <950000>;
++                              regulator-max-microvolt = <950000>;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdda_0v9: LDO_REG2 {
++                              regulator-name = "vdda_0v9";
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <900000>;
++                              regulator-max-microvolt = <900000>;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdda0v9_pmu: LDO_REG3 {
++                              regulator-name = "vdda0v9_pmu";
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <900000>;
++                              regulator-max-microvolt = <900000>;
++
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <900000>;
++                              };
++                      };
++
++                      vccio_acodec: LDO_REG4 {
++                              regulator-name = "vccio_acodec";
++                              regulator-min-microvolt = <3300000>;
++                              regulator-max-microvolt = <3300000>;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vccio_sd: LDO_REG5 {
++                              regulator-name = "vccio_sd";
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <3300000>;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcc3v3_pmu: LDO_REG6 {
++                              regulator-name = "vcc3v3_pmu";
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <3300000>;
++                              regulator-max-microvolt = <3300000>;
++
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <3300000>;
++                              };
++                      };
++
++                      vcca_1v8: LDO_REG7 {
++                              regulator-name = "vcca_1v8";
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcca1v8_pmu: LDO_REG8 {
++                              regulator-name = "vcca1v8_pmu";
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <1800000>;
++                              };
++                      };
++
++                      vcca1v8_image: LDO_REG9 {
++                              regulator-name = "vcca1v8_image";
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcc_3v3: SWITCH_REG1 {
++                              regulator-name = "vcc_3v3";
++                              regulator-always-on;
++                              regulator-boot-on;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcc3v3_sd: SWITCH_REG2 {
++                              regulator-name = "vcc3v3_sd";
++                              regulator-always-on;
++                              regulator-boot-on;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++              };
++      };
++};
++
++&i2s0_8ch {
++      status = "okay";
++};
++
++&mdio0 {
++      rgmii_phy0: ethernet-phy@1 {
++              compatible = "ethernet-phy-ieee802.3-c22";
++              reg = <0x1>;
++              pinctrl-0 = <&eth_phy0_reset_pin>;
++              pinctrl-names = "default";
++              reset-assert-us = <20000>;
++              reset-deassert-us = <100000>;
++              reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
++      };
++};
++
++&mdio1 {
++      rgmii_phy1: ethernet-phy@1 {
++              compatible = "ethernet-phy-ieee802.3-c22";
++              reg = <0x1>;
++              pinctrl-0 = <&eth_phy1_reset_pin>;
++              pinctrl-names = "default";
++              reset-assert-us = <20000>;
++              reset-deassert-us = <100000>;
++              reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
++      };
++};
++
++/* ETH3 */
++&pcie2x1 {
++      reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
++      vpcie3v3-supply = <&vcc3v3_sys>;
++      status = "okay";
++};
++
++&pcie30phy {
++      data-lanes = <1 2>;
++      status = "okay";
++};
++
++/* ETH2 */
++&pcie3x1 {
++      num-lanes = <1>;
++      reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
++      vpcie3v3-supply = <&vcc3v3_sys>;
++      status = "okay";
++};
++
++/* M.2 Key for 2280 NVMe */
++&pcie3x2 {
++      num-lanes = <1>;
++      reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
++      vpcie3v3-supply = <&vcc3v3_nvme>;
++      status = "okay";
++};
++
++&pinctrl {
++      gmac0 {
++              eth_phy0_reset_pin: eth-phy0-reset-pin {
++                      rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
++              };
++      };
++
++      gmac1 {
++              eth_phy1_reset_pin: eth-phy1-reset-pin {
++                      rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
++              };
++      };
++
++      gpio-leds {
++              status_led_pin: status-led-pin {
++                      rockchip,pins = <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++      };
++
++      nvme {
++              vcc3v3_nvme_en: vcc3v3-nvme-en {
++                      rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++      };
++
++      pcie-nic {
++              vdd0v95_25glan_en: vdd0v95-25glan-en {
++                      rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++      };
++
++      pmic {
++              pmic_int: pmic-int {
++                      rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
++              };
++      };
++
++};
++
++&pmu_io_domains {
++      pmuio1-supply = <&vcc3v3_pmu>;
++      pmuio2-supply = <&vcc3v3_pmu>;
++      vccio1-supply = <&vccio_acodec>;
++      vccio3-supply = <&vccio_sd>;
++      vccio4-supply = <&vcc_1v8>;
++      vccio5-supply = <&vcc_3v3>;
++      vccio6-supply = <&vcc_1v8>;
++      vccio7-supply = <&vcc_3v3>;
++      status = "okay";
++};
++
++&saradc {
++      vref-supply = <&vcca_1v8>;
++      status = "okay";
++};
++
++&sdhci {
++      bus-width = <8>;
++      max-frequency = <200000000>;
++      non-removable;
++      pinctrl-names = "default";
++      pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
++      status = "okay";
++};
++
++&tsadc {
++      rockchip,hw-tshut-mode = <1>;
++      rockchip,hw-tshut-polarity = <0>;
++      status = "okay";
++};
++
++&uart2 {
++      status = "okay";
++};
++
++/* OTG Only USB2.0, Only device mode */
++&usb_host0_xhci {
++      dr_mode = "peripheral";
++      extcon = <&usb2phy0>;
++      maximum-speed = "high-speed";
++      phys = <&usb2phy0_otg>;
++      phy-names = "usb2-phy";
++      status = "okay";
++};
++
++&usb_host1_xhci {
++      status = "okay";
++};
++
++&usb2phy0 {
++      status = "okay";
++};
++
++&usb2phy0_host {
++      phy-supply = <&vcc5v0_sys>;
++      status = "okay";
++};
++
++&usb2phy0_otg {
++      status = "okay";
++};
++
++&vop {
++      assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
++      assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
++      status = "okay";
++};
++
++&vop_mmu {
++      status = "okay";
++};
++
++&vp0 {
++      vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
++              reg = <ROCKCHIP_VOP2_EP_HDMI0>;
++              remote-endpoint = <&hdmi_in_vp0>;
++      };
++};

diff --git a/target/linux/rockchip/patches-6.6/053-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6S.patch b/target/linux/rockchip/patches-6.6/053-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6S.patch
index f31f38ac9d9ce3e887f57e024362a2538e38d975..811a75fd75a97e2544cde19bbad005ec66b1a07b 100644 (file)
--- a/target/linux/rockchip/patches-6.6/053-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6S.patch
+++ b/target/linux/rockchip/patches-6.6/053-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6S.patch
@@ -17,7 +17,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 
 --- a/arch/arm64/boot/dts/rockchip/Makefile
 +++ b/arch/arm64/boot/dts/rockchip/Makefile
-@@ -109,4 +109,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-na
+@@ -110,4 +110,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-na
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb

diff --git a/target/linux/rockchip/patches-6.6/054-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6C.patch b/target/linux/rockchip/patches-6.6/054-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6C.patch
index b63c01338fcc89e154122938a2dfedaa22cd4781..4b3f686bf12f21ea04aaa3ecf7767f3d560e698c 100644 (file)
--- a/target/linux/rockchip/patches-6.6/054-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6C.patch
+++ b/target/linux/rockchip/patches-6.6/054-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6C.patch
@@ -17,7 +17,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 
 --- a/arch/arm64/boot/dts/rockchip/Makefile
 +++ b/arch/arm64/boot/dts/rockchip/Makefile
-@@ -110,4 +110,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ro
+@@ -111,4 +111,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ro
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6s.dtb

diff --git a/target/linux/rockchip/patches-6.6/056-01-v6.10-arm64-dts-rockchip-Add-ArmSom-Sige7-board.patch b/target/linux/rockchip/patches-6.6/056-01-v6.10-arm64-dts-rockchip-Add-ArmSom-Sige7-board.patch
index c60b97910942057c174b967c3e4468cf27f4881e..cecbfe457cecfed4f33ef4fc75caf7f3c93725d0 100644 (file)
--- a/target/linux/rockchip/patches-6.6/056-01-v6.10-arm64-dts-rockchip-Add-ArmSom-Sige7-board.patch
+++ b/target/linux/rockchip/patches-6.6/056-01-v6.10-arm64-dts-rockchip-Add-ArmSom-Sige7-board.patch
@@ -44,7 +44,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 
 --- a/arch/arm64/boot/dts/rockchip/Makefile
 +++ b/arch/arm64/boot/dts/rockchip/Makefile
-@@ -102,6 +102,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ra
+@@ -103,6 +103,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ra
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3b.dtb

diff --git a/target/linux/rockchip/patches-6.6/135-arm64-dts-rockchip-Update-LED-properties-for-LinkEase-EasePi-R1.patch b/target/linux/rockchip/patches-6.6/135-arm64-dts-rockchip-Update-LED-properties-for-LinkEase-EasePi-R1.patch
new file mode 100644 (file)
index 0000000..9004696
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/135-arm64-dts-rockchip-Update-LED-properties-for-LinkEase-EasePi-R1.patch
@@ -0,0 +1,14 @@
+--- a/arch/arm64/boot/dts/rockchip/rk3568-easepi-r1.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3568-easepi-r1.dts
+@@ -17,6 +17,11 @@
+               ethernet0 = &gmac0;
+               ethernet1 = &gmac1;
+               mmc0 = &sdhci;
++
++              led-boot     = &status_led;
++              led-failsafe = &status_led;
++              led-running  = &status_led;
++              led-upgrade  = &status_led;
+       };
+ 
+       chosen: chosen {