]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: layerscape: add msi-cell = <1> for gic its
authorFrank Li <Frank.Li@nxp.com>
Mon, 29 Jul 2024 18:59:28 +0000 (14:59 -0400)
committerShawn Guo <shawnguo@kernel.org>
Tue, 13 Aug 2024 07:26:50 +0000 (15:26 +0800)
Add msi-cell = <1> for GIC ITS. msi-parent have to be kept because it is
checked by U-Boot due to historical reasons to fix up msi-map.

Fix below CHECK_DTBS warning:
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb: interrupt-controller@6000000: msi-controller@6020000: '#msi-cells' is a required property
        from schema $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v3.yaml

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi

index 701f0b2a3e579f7ee55433bb00eb2b677fad84a0..5e77c438f8840e7d165ea6c932581cdd9466381a 100644 (file)
                its: msi-controller@6020000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
+                       #msi-cells = <1>;
                        reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */
                };
        };
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000   /* downstream I/O */
                                  0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000   /* downstream I/O */
                                  0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
                        reg = <0x01 0xf0000000 0x0 0x100000>;
                        #address-cells = <3>;
                        #size-cells = <2>;
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        device_type = "pci";
                        bus-range = <0x0 0x0>;
                        dma-coherent;
index c980f4c5dcfdc44d74687ec5fc750dafd6f3fb9d..3533779f737ab2aefbd50d1968180b1a7d98edcd 100644 (file)
                its: msi-controller@6020000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
+                       #msi-cells = <1>;
                        reg = <0x0 0x6020000 0 0x20000>;
                };
        };
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000   /* downstream I/O */
                                  0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000   /* downstream I/O */
                                  0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
                        bus-range = <0x0 0xff>;
                        ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000   /* downstream I/O */
                                  0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,
                        compatible = "fsl,qoriq-mc";
                        reg = <0x00000008 0x0c000000 0 0x40>,    /* MC portal base */
                              <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        iommu-map = <0 &smmu 0 0>;      /* This is fixed-up by u-boot */
                        dma-coherent;
                        #address-cells = <3>;
index 8691117ffcf760508441cd98d57655c9d289faf8..3213a8fe0b3b41911919cf01fc3f5f70c1563883 100644 (file)
@@ -63,6 +63,7 @@
                its: msi-controller@6020000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
+                       #msi-cells = <1>;
                        reg = <0x0 0x6020000 0 0x20000>;
                };
        };
                        compatible = "fsl,qoriq-mc";
                        reg = <0x00000008 0x0c000000 0 0x40>,    /* MC portal base */
                              <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        iommu-map = <0 &smmu 0 0>;      /* This is fixed-up by u-boot */
                        dma-coherent;
                        #address-cells = <3>;
                        dma-coherent;
                        num-viewport = <6>;
                        bus-range = <0x0 0xff>;
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
                        dma-coherent;
                        num-viewport = <6>;
                        bus-range = <0x0 0xff>;
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
                        dma-coherent;
                        num-viewport = <256>;
                        bus-range = <0x0 0xff>;
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
                        dma-coherent;
                        num-viewport = <6>;
                        bus-range = <0x0 0xff>;
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
index 73ee45acfde13c3916e98ffc1cff2c59c8a88ec2..8810f78c327c7b7a867a9979d4c299bbd5bacc85 100644 (file)
                its: msi-controller@6020000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
+                       #msi-cells = <1>;
                        reg = <0x0 0x6020000 0 0x20000>;
                };
        };
                        ppio-wins = <8>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
                        ppio-wins = <8>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
                        ppio-wins = <24>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
                        ppio-wins = <8>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
                        ppio-wins = <24>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
                        ppio-wins = <8>;
                        bus-range = <0x0 0xff>;
                        ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 7>;
                        interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
                        compatible = "fsl,qoriq-mc";
                        reg = <0x00000008 0x0c000000 0 0x40>,
                              <0x00000000 0x08340000 0 0x40000>;
-                       msi-parent = <&its>;
+                       msi-parent = <&its 0>;
                        /* iommu-map property is fixed up by u-boot */
                        iommu-map = <0 &smmu 0 0>;
                        dma-coherent;