]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: imx95-19x19-evk: fix the overshoot issue of NETC
authorWei Fang <wei.fang@nxp.com>
Wed, 28 May 2025 08:34:31 +0000 (16:34 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 24 Jul 2025 06:58:33 +0000 (08:58 +0200)
[ Upstream commit 36c2bf42b6f02ded87a381edc6b500cd6aac5018 ]

The overshoot of MDIO, MDC and ENET1_TDx is too high, so reduce the drive
strength these pins.

Fixes: 025cf78938c2 ("arm64: dts: imx95-19x19-evk: add ENETC 0 support")
Signed-off-by: Wei Fang <wei.fang@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts

index 25ac331f03183e3e8adebcbff4d4deb012cc25ea..9a4d5f7f9e7f9959f6707bbe945f7605bfae54e8 100644 (file)
 &scmi_iomuxc {
        pinctrl_emdio: emdiogrp{
                fsl,pins = <
-                       IMX95_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC               0x57e
-                       IMX95_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO             0x97e
+                       IMX95_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC               0x50e
+                       IMX95_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO             0x90e
                >;
        };
 
        pinctrl_enetc0: enetc0grp {
                fsl,pins = <
-                       IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3         0x57e
-                       IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2         0x57e
-                       IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1         0x57e
-                       IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0         0x57e
+                       IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3         0x50e
+                       IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2         0x50e
+                       IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1         0x50e
+                       IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0         0x50e
                        IMX95_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL   0x57e
                        IMX95_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK      0x58e
                        IMX95_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL   0x57e