Make mve_fp_fpu[12].c accept single or double precision FPU

This tests currently expect a directive containing .fpu fpv5-sp-d16
and thus may fail if the test is executed for instance with
-march=armv8.1-m.main+mve.fp+fp.dp

This patch accepts either fpv5-sp-d16 or fpv5-d16 to avoid the failure.

2023-06-28  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c: Fix .fpu
	scan-assembler.
	* gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
index e375327fb97da1379506af68bdeba0b782a5ddd2..8358a616bb52551050a00fe02b5299abbc824692 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
@@ -12,4 +12,4 @@ foo1 (int8x16_t value)
   return b;
 }
 
-/* { dg-final { scan-assembler "\.fpu fpv5-sp-d16" }  } */
+/* { dg-final { scan-assembler "\.fpu fpv5(-sp|)-d16" }  } */

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
index 1fca1100cf0d5a3f02c39e43bbd88bdc0dddc5eb..5dd2feefc35f1d231f51109fa6911ed1c3b2a7bf 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
@@ -12,4 +12,4 @@ foo1 (int8x16_t value)
   return b;
 }
 
-/* { dg-final { scan-assembler "\.fpu fpv5-sp-d16" }  } */
+/* { dg-final { scan-assembler "\.fpu fpv5(-sp|)-d16" }  } */