pub struct IrqTypes(u32);
impl IrqTypes {
- /// Create a set containing all IRQ types (MSI-X, MSI, and Legacy).
+ /// Create a set containing all IRQ types (MSI-X, MSI, and INTx).
pub const fn all() -> Self {
Self(bindings::PCI_IRQ_ALL_TYPES)
}
/// # Examples
///
/// ```ignore
- /// // Create a set with only MSI and MSI-X (no legacy interrupts).
+ /// // Create a set with only MSI and MSI-X (no INTx interrupts).
/// let msi_only = IrqTypes::default()
/// .with(IrqType::Msi)
/// .with(IrqType::MsiX);
/// Allocate IRQ vectors for this PCI device with automatic cleanup.
///
/// Allocates between `min_vecs` and `max_vecs` interrupt vectors for the device.
- /// The allocation will use MSI-X, MSI, or legacy interrupts based on the `irq_types`
+ /// The allocation will use MSI-X, MSI, or INTx interrupts based on the `irq_types`
/// parameter and hardware capabilities. When multiple types are specified, the kernel
- /// will try them in order of preference: MSI-X first, then MSI, then legacy interrupts.
+ /// will try them in order of preference: MSI-X first, then MSI, then INTx interrupts.
///
/// The allocated vectors are automatically freed when the device is unbound, using the
/// devres (device resource management) system.
/// // Allocate using any available interrupt type in the order mentioned above.
/// let vectors = dev.alloc_irq_vectors(1, 32, pci::IrqTypes::all())?;
///
- /// // Allocate MSI or MSI-X only (no legacy interrupts).
+ /// // Allocate MSI or MSI-X only (no INTx interrupts).
/// let msi_only = pci::IrqTypes::default()
/// .with(pci::IrqType::Msi)
/// .with(pci::IrqType::MsiX);