]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: Use memcpy to update IPD table for sriov guest
authorHawking Zhang <Hawking.Zhang@amd.com>
Sun, 1 Feb 2026 19:32:52 +0000 (03:32 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 11 Mar 2026 17:58:07 +0000 (13:58 -0400)
On some hardware configuration, sriov guests
cannot access mm_index and mm_data. Update the
IPD table via memcpy in these cases

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h

index 0ea3c8ad158c33e788ac2336d63650d62f7aec97..9b0a3107bc9060fff03ad80e1e4aca20db8c1a0b 100644 (file)
@@ -356,10 +356,15 @@ static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev,
        int ret = 0;
 
        if (!is_tmr_in_sysmem) {
-               amdgpu_device_vram_access(adev, adev->discovery.offset,
-                                         (uint32_t *)binary,
-                                         adev->discovery.size, false);
-               adev->discovery.reserve_tmr = true;
+               if (amdgpu_sriov_vf(adev) &&
+                   amdgpu_sriov_xgmi_connected_to_cpu(adev)) {
+                       ret = amdgpu_discovery_read_binary_from_sysmem(adev, binary);
+               } else {
+                       amdgpu_device_vram_access(adev, adev->discovery.offset,
+                                                 (uint32_t *)binary,
+                                                 adev->discovery.size, false);
+                       adev->discovery.reserve_tmr = true;
+               }
        } else {
                ret = amdgpu_discovery_read_binary_from_sysmem(adev, binary);
        }
index 886fbce0bfd1d1876b2af19a827c1c4495114156..9da0c6e9b8695e4e4446af376f278d652ebe09cb 100644 (file)
@@ -162,6 +162,7 @@ enum AMDGIM_FEATURE_FLAG {
        AMDGIM_FEATURE_RAS_TELEMETRY = (1 << 10),
        AMDGIM_FEATURE_RAS_CPER = (1 << 11),
        AMDGIM_FEATURE_XGMI_TA_EXT_PEER_LINK = (1 << 12),
+       AMDGIM_FEATURE_XGMI_CONNECTED_TO_CPU = (1 << 13),
 };
 
 enum AMDGIM_REG_ACCESS_FLAG {
@@ -412,6 +413,9 @@ struct amdgpu_video_codec_info;
 #define amdgpu_sriov_xgmi_ta_ext_peer_link_en(adev) \
 ((adev)->virt.gim_feature & AMDGIM_FEATURE_XGMI_TA_EXT_PEER_LINK)
 
+#define amdgpu_sriov_xgmi_connected_to_cpu(adev) \
+((adev)->virt.gim_feature & AMDGIM_FEATURE_XGMI_CONNECTED_TO_CPU)
+
 static inline bool is_virtual_machine(void)
 {
 #if defined(CONFIG_X86)
index a841f342a3ebbf0fac660defc73957cc978eb989..847cfd1fd0046713658f74e6615cd297e2bf4eef 100644 (file)
@@ -161,7 +161,8 @@ union amd_sriov_msg_feature_flags {
                uint32_t ras_telemetry          : 1;
                uint32_t ras_cper               : 1;
                uint32_t xgmi_ta_ext_peer_link  : 1;
-               uint32_t reserved               : 19;
+               uint32_t xgmi_connected_to_cpu  : 1;
+               uint32_t reserved               : 18;
        } flags;
        uint32_t all;
 };