drm/v3d: Enable Performance Counters before clearing them

[ Upstream commit c98b10496b2f3c4f576af3482c71aadcfcbf765e ]

On the Raspberry Pi 5, performance counters are not being cleared
when `v3d_perfmon_start()` is called, even though we write to the
CLR register. As a result, their values accumulate until they
overflow.

The expected behavior is for performance counters to reset to zero
at the start of a job. When the job finishes and the perfmon is
stopped, the counters should accurately reflect the values for that
specific job.

To ensure this behavior, the performance counters are now enabled
before being cleared. This allows the CLR register to function as
intended, zeroing the counter values when the job begins.

Fixes: 26a4dc29b74a ("drm/v3d: Expose performance counters to userspace")
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241204122831.17015-1-mcanal@igalia.com
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/v3d/v3d_perfmon.c b/drivers/gpu/drm/v3d/v3d_perfmon.c
index b74b537e620fc5e28e02480398c3c7aa768df563..3de4cc692f44d85199512a00f254d01b8a3b3bfa 100644 (file)
--- a/drivers/gpu/drm/v3d/v3d_perfmon.c
+++ b/drivers/gpu/drm/v3d/v3d_perfmon.c
@@ -49,9 +49,9 @@ void v3d_perfmon_start(struct v3d_dev *v3d, struct v3d_perfmon *perfmon)
                V3D_CORE_WRITE(0, V3D_V4_PCTR_0_SRC_X(source), channel);
        }
 
+       V3D_CORE_WRITE(0, V3D_V4_PCTR_0_EN, mask);
        V3D_CORE_WRITE(0, V3D_V4_PCTR_0_CLR, mask);
        V3D_CORE_WRITE(0, V3D_PCTR_0_OVERFLOW, mask);
-       V3D_CORE_WRITE(0, V3D_V4_PCTR_0_EN, mask);
 
        v3d->active_perfmon = perfmon;
 }