backport: re PR testsuite/60672 (FAIL: g++.dg/cpp1y/auto-fn25.C -std=gnu++1y (test...

[gcc]
2014-04-22  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Back port from main line:
	2014-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000-builtins.def (VBPERMQ): Add vbpermq builtin
	for ISA 2.07.

	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
	vbpermq builtins.

	* config/rs6000/altivec.md (UNSPEC_VBPERMQ): Add support for the
	vbpermq instruction.
	(altivec_vbpermq): Likewise.

	PR target/60672
	* config/rs6000/altivec.h (vec_xxsldwi): Add missing define to
	enable use of xxsldwi and xxpermdi builtin functions.
	(vec_xxpermdi): Likewise.

	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
	Document use of vec_xxsldwi and vec_xxpermdi builtins.

[gcc/testsuite]
2014-04-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Back port from main line:
	2014-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/p8vector-vbpermq.c: New test to test the
	vbpermq builtin.

From-SVN: r209726

diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index 9561d8de2b4de01e089353f99d09ba5c45e13bde..f101751f6ab0173b88eadf23b4a85b6b519f0802 100644 (file)
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -319,6 +319,11 @@
 #define vec_sqrt __builtin_vec_sqrt
 #define vec_vsx_ld __builtin_vec_vsx_ld
 #define vec_vsx_st __builtin_vec_vsx_st
+
+/* Note, xxsldi and xxpermdi were added as __builtin_vsx_<xxx> functions
+   instead of __builtin_vec_<xxx>  */
+#define vec_xxsldwi __builtin_vsx_xxsldwi
+#define vec_xxpermdi __builtin_vsx_xxpermdi
 #endif
 
 #ifdef _ARCH_PWR8
@@ -329,6 +334,7 @@
 #define vec_vaddcuq __builtin_vec_vaddcuq
 #define vec_vaddudm __builtin_vec_vaddudm
 #define vec_vadduqm __builtin_vec_vadduqm
+#define vec_vbpermq __builtin_vec_vbpermq
 #define vec_vclz __builtin_vec_vclz
 #define vec_vclzb __builtin_vec_vclzb
 #define vec_vclzd __builtin_vec_vclzd

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 5e9e54db08b784c87808a465524ae58cd3e6076d..e4de86c07db9e5751325b0823a53d7717183f246 100644 (file)
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -142,6 +142,7 @@
    UNSPEC_VSUBCUQ
    UNSPEC_VSUBEUQM
    UNSPEC_VSUBECUQ
+   UNSPEC_VBPERMQ
 ])
 
 (define_c_enum "unspecv"
@@ -3322,3 +3323,14 @@
   [(set_attr "length" "4")
    (set_attr "type" "vecsimple")])
 
+;; We use V2DI as the output type to simplify converting the permute
+;; bits into an integer
+(define_insn "altivec_vbpermq"
+  [(set (match_operand:V2DI 0 "register_operand" "=v")
+       (unspec:V2DI [(match_operand:V16QI 1 "register_operand" "v")
+                     (match_operand:V16QI 2 "register_operand" "v")]
+                    UNSPEC_VBPERMQ))]
+  "TARGET_P8_VECTOR"
+  "vbpermq %0,%1,%2"
+  [(set_attr "length" "4")
+   (set_attr "type" "vecsimple")])

diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index 4101317b083e8c7a7f1ce1c88bd931809685378f..02409cf00e82cabae1c23d8768aa3a6792136ee7 100644 (file)
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -1374,6 +1374,7 @@ BU_P8V_AV_2 (VMINUD,              "vminud",       CONST,  uminv2di3)
 BU_P8V_AV_2 (VMAXUD,           "vmaxud",       CONST,  umaxv2di3)
 BU_P8V_AV_2 (VMRGEW,           "vmrgew",       CONST,  p8_vmrgew)
 BU_P8V_AV_2 (VMRGOW,           "vmrgow",       CONST,  p8_vmrgow)
+BU_P8V_AV_2 (VBPERMQ,          "vbpermq",      CONST,  altivec_vbpermq)
 BU_P8V_AV_2 (VPKUDUM,          "vpkudum",      CONST,  altivec_vpkudum)
 BU_P8V_AV_2 (VPKSDSS,          "vpksdss",      CONST,  altivec_vpksdss)
 BU_P8V_AV_2 (VPKUDUS,          "vpkudus",      CONST,  altivec_vpkudus)
@@ -1448,6 +1449,7 @@ BU_P8V_OVERLOAD_2 (ORC,           "orc")
 BU_P8V_OVERLOAD_2 (VADDCUQ,    "vaddcuq")
 BU_P8V_OVERLOAD_2 (VADDUDM,    "vaddudm")
 BU_P8V_OVERLOAD_2 (VADDUQM,    "vadduqm")
+BU_P8V_OVERLOAD_2 (VBPERMQ,    "vbpermq")
 BU_P8V_OVERLOAD_2 (VMAXSD,     "vmaxsd")
 BU_P8V_OVERLOAD_2 (VMAXUD,     "vmaxud")
 BU_P8V_OVERLOAD_2 (VMINSD,     "vminsd")

diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index 6186a1607632ddc1662fd30cdb26236af2a66a2d..9cb6387b9ed29c6cac963e019ef9d684c5e9fd82 100644 (file)
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -3776,6 +3776,12 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
     RS6000_BTI_unsigned_V1TI, 0 },
 
+  { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,
+    RS6000_BTI_V2DI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,
+    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI,
+    RS6000_BTI_unsigned_V16QI, 0 },
+
   { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
   { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB,

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 304d4bdae02b83599bddf59aa2613a0c1543550f..8e75ae80bd8846d156da272939cbde0513db5b69 100644 (file)
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -13924,6 +13924,35 @@ void vec_vsx_st (vector unsigned char, int, unsigned char *);
 void vec_vsx_st (vector bool char, int, vector bool char *);
 void vec_vsx_st (vector bool char, int, unsigned char *);
 void vec_vsx_st (vector bool char, int, signed char *);
+
+vector double vec_xxpermdi (vector double, vector double, int);
+vector float vec_xxpermdi (vector float, vector float, int);
+vector long long vec_xxpermdi (vector long long, vector long long, int);
+vector unsigned long long vec_xxpermdi (vector unsigned long long,
+                                        vector unsigned long long, int);
+vector int vec_xxpermdi (vector int, vector int, int);
+vector unsigned int vec_xxpermdi (vector unsigned int,
+                                  vector unsigned int, int);
+vector short vec_xxpermdi (vector short, vector short, int);
+vector unsigned short vec_xxpermdi (vector unsigned short,
+                                    vector unsigned short, int);
+vector signed char vec_xxpermdi (vector signed char, vector signed char, int);
+vector unsigned char vec_xxpermdi (vector unsigned char,
+                                   vector unsigned char, int);
+
+vector double vec_xxsldi (vector double, vector double, int);
+vector float vec_xxsldi (vector float, vector float, int);
+vector long long vec_xxsldi (vector long long, vector long long, int);
+vector unsigned long long vec_xxsldi (vector unsigned long long,
+                                      vector unsigned long long, int);
+vector int vec_xxsldi (vector int, vector int, int);
+vector unsigned int vec_xxsldi (vector unsigned int, vector unsigned int, int);
+vector short vec_xxsldi (vector short, vector short, int);
+vector unsigned short vec_xxsldi (vector unsigned short,
+                                  vector unsigned short, int);
+vector signed char vec_xxsldi (vector signed char, vector signed char, int);
+vector unsigned char vec_xxsldi (vector unsigned char,
+                                 vector unsigned char, int);
 @end smallexample
 
 Note that the @samp{vec_ld} and @samp{vec_st} built-in functions always
@@ -14111,6 +14140,9 @@ vector unsigned long long vec_vaddudm (vector bool unsigned long long,
 vector unsigned long long vec_vaddudm (vector unsigned long long,
                                        vector bool unsigned long long);
 
+vector long long vec_vbpermq (vector signed char, vector signed char);
+vector long long vec_vbpermq (vector unsigned char, vector unsigned char);
+
 vector long long vec_vclz (vector long long);
 vector unsigned long long vec_vclz (vector unsigned long long);
 vector int vec_vclz (vector int);

diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c b/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c
new file mode 100644 (file)
index 0000000..d166498
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c
@@ -0,0 +1,27 @@
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-O3 -mcpu=power8" } */
+/* { dg-final { scan-assembler     "vbpermq" } } */
+/* { dg-final { scan-assembler     "mfvsrd"  } } */
+/* { dg-final { scan-assembler-not "stfd"    } } */
+/* { dg-final { scan-assembler-not "stxvd2x" } } */
+
+#include <altivec.h>
+
+#if __LITTLE_ENDIAN__
+#define OFFSET 1
+#else
+#define OFFSET 0
+#endif
+
+long foos (vector signed char a, vector signed char b)
+{
+  return vec_extract (vec_vbpermq (a, b), OFFSET);
+}
+
+long foou (vector unsigned char a, vector unsigned char b)
+{
+  return vec_extract (vec_vbpermq (a, b), OFFSET);
+}
+