phy: rockchip: samsung-hdptx: Setup TMDS char rate via phy_configure_opts_hdmi

The current workaround to setup the TMDS character rate relies on the
unconventional usage of phy_set_bus_width().

Make use of the recently introduced HDMI PHY configuration API to
properly handle the setup.  The workaround will be dropped as soon as
the switch has been completed on both ends.

Rename rk_hdptx_phy_verify_config() to rk_hdptx_phy_verify_dp_config()
and introduce the rk_hdptx_phy_verify_hdmi_config() helper to check the
HDMI parameters during phy_configure().

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20250318-phy-sam-hdptx-bpc-v6-9-8cb1678e7663@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
index e4f6b1d6d999ae01eb7a9a35ea1748b8a2da339c..62de40515338730a56a83972ad57a7e71c3ca5cb 100644 (file)
--- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
@@ -394,6 +394,7 @@ struct rk_hdptx_phy {
 
        int phy_id;
        struct phy *phy;
+       struct phy_configure_opts_hdmi hdmi_cfg;
        struct clk_bulk_data *clks;
        int nr_clks;
        struct reset_control_bulk_data rsts[RST_MAX];
@@ -1412,20 +1413,24 @@ static int rk_hdptx_phy_power_on(struct phy *phy)
 {
        struct rk_hdptx_phy *hdptx = phy_get_drvdata(phy);
        enum phy_mode mode = phy_get_mode(phy);
-       unsigned long long rate;
        int ret, lane;
 
-       /*
-        * FIXME: Temporary workaround to pass pixel_clk_rate
-        * from the HDMI bridge driver until phy_configure_opts_hdmi
-        * becomes available in the PHY API.
-        */
-       rate = phy_get_bus_width(hdptx->phy) & 0xfffffff;
-       rate *= 100;
+       if (mode != PHY_MODE_DP) {
+               if (!hdptx->hdmi_cfg.tmds_char_rate) {
+                       /*
+                        * FIXME: Temporary workaround to setup TMDS char rate
+                        * from the RK DW HDMI QP bridge driver.
+                        * Will be removed as soon the switch to the HDMI PHY
+                        * configuration API has been completed on both ends.
+                        */
+                       hdptx->hdmi_cfg.tmds_char_rate = phy_get_bus_width(hdptx->phy) & 0xfffffff;
+                       hdptx->hdmi_cfg.tmds_char_rate *= 100;
+               }
 
-       dev_dbg(hdptx->dev, "%s rate=%llu\n", __func__, rate);
+               dev_dbg(hdptx->dev, "%s rate=%llu\n", __func__, hdptx->hdmi_cfg.tmds_char_rate);
+       }
 
-       ret = rk_hdptx_phy_consumer_get(hdptx, rate);
+       ret = rk_hdptx_phy_consumer_get(hdptx, hdptx->hdmi_cfg.tmds_char_rate);
        if (ret)
                return ret;
 
@@ -1456,7 +1461,7 @@ static int rk_hdptx_phy_power_on(struct phy *phy)
                regmap_write(hdptx->grf, GRF_HDPTX_CON0,
                             HDPTX_MODE_SEL << 16 | FIELD_PREP(HDPTX_MODE_SEL, 0x0));
 
-               ret = rk_hdptx_ropll_tmds_mode_config(hdptx, rate);
+               ret = rk_hdptx_ropll_tmds_mode_config(hdptx, hdptx->hdmi_cfg.tmds_char_rate);
                if (ret)
                        rk_hdptx_phy_consumer_put(hdptx, true);
        }
@@ -1471,8 +1476,27 @@ static int rk_hdptx_phy_power_off(struct phy *phy)
        return rk_hdptx_phy_consumer_put(hdptx, false);
 }
 
-static int rk_hdptx_phy_verify_config(struct rk_hdptx_phy *hdptx,
-                                     struct phy_configure_opts_dp *dp)
+static int rk_hdptx_phy_verify_hdmi_config(struct rk_hdptx_phy *hdptx,
+                                          struct phy_configure_opts_hdmi *hdmi)
+{
+       int i;
+
+       if (!hdmi->tmds_char_rate || hdmi->tmds_char_rate > HDMI20_MAX_RATE)
+               return -EINVAL;
+
+       for (i = 0; i < ARRAY_SIZE(ropll_tmds_cfg); i++)
+               if (hdmi->tmds_char_rate == ropll_tmds_cfg[i].rate)
+                       break;
+
+       if (i == ARRAY_SIZE(ropll_tmds_cfg) &&
+           !rk_hdptx_phy_clk_pll_calc(hdmi->tmds_char_rate, NULL))
+               return -EINVAL;
+
+       return 0;
+}
+
+static int rk_hdptx_phy_verify_dp_config(struct rk_hdptx_phy *hdptx,
+                                        struct phy_configure_opts_dp *dp)
 {
        int i;
 
@@ -1732,12 +1756,18 @@ static int rk_hdptx_phy_configure(struct phy *phy, union phy_configure_opts *opt
        enum phy_mode mode = phy_get_mode(phy);
        int ret;
 
-       if (mode != PHY_MODE_DP)
-               return 0;
+       if (mode != PHY_MODE_DP) {
+               ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &opts->hdmi);
+               if (ret)
+                       dev_err(hdptx->dev, "invalid hdmi params for phy configure\n");
+               else
+                       hdptx->hdmi_cfg = opts->hdmi;
+               return ret;
+       }
 
-       ret = rk_hdptx_phy_verify_config(hdptx, &opts->dp);
+       ret = rk_hdptx_phy_verify_dp_config(hdptx, &opts->dp);
        if (ret) {
-               dev_err(hdptx->dev, "invalid params for phy configure\n");
+               dev_err(hdptx->dev, "invalid dp params for phy configure\n");
                return ret;
        }