Deal with CLFLUSH, which were not correctly dealt with (w.r.t. new IR

generation conventions) and caused bb_to_IR.c to assert.

git-svn-id: svn://svn.valgrind.org/vex/branches/TCHAIN@2283

diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c
index a4a02037fdaf231037972f03438fe8ab088c287c..ab79312c97a0fa3aa98adb76c9b648ab6b1dc5c6 100644 (file)
--- a/VEX/priv/guest_amd64_toIR.c
+++ b/VEX/priv/guest_amd64_toIR.c
@@ -11482,10 +11482,8 @@ Long dis_ESC_0F__SSE2 ( Bool* decode_OK,
                          mkU64( ~(lineszB-1) ))) );
 
          stmt( IRStmt_Put(OFFB_TILEN, mkU64(lineszB) ) );
- 
-         irsb->jumpkind = Ijk_TInval;
-         irsb->next     = mkU64(guest_RIP_bbstart+delta);
-         dres->whatNext = Dis_StopHere;
+
+         jmp_lit(dres, Ijk_TInval, (Addr64)(guest_RIP_bbstart+delta));
 
          DIP("clflush %s\n", dis_buf);
          goto decode_success;

diff --git a/VEX/priv/guest_x86_toIR.c b/VEX/priv/guest_x86_toIR.c
index ee51b43b6b2666395c95e5a5db0cbc2e015844c1..8db5b5432c6bd582dd9079421a04b242761a9ce5 100644 (file)
--- a/VEX/priv/guest_x86_toIR.c
+++ b/VEX/priv/guest_x86_toIR.c
@@ -11549,9 +11549,7 @@ DisResult disInstr_X86_WRK (
 
       stmt( IRStmt_Put(OFFB_TILEN, mkU32(lineszB) ) );
 
-      irsb->jumpkind = Ijk_TInval;
-      irsb->next     = mkU32(guest_EIP_bbstart+delta);
-      dres.whatNext  = Dis_StopHere;
+      jmp_lit(&dres, Ijk_TInval, (Addr32)(guest_EIP_bbstart+delta));
 
       DIP("clflush %s\n", dis_buf);
       goto decode_success;

diff --git a/VEX/priv/host_amd64_isel.c b/VEX/priv/host_amd64_isel.c
index 63ba74c75faa25b0b45dfbdd60ad19078c60f5a2..a365a5ac63ce37f7c984bc66fabb2c1e02d3b088 100644 (file)
--- a/VEX/priv/host_amd64_isel.c
+++ b/VEX/priv/host_amd64_isel.c
@@ -4263,7 +4263,7 @@ static void iselNext ( ISelEnv* env,
    /* Case: some other kind of transfer to any address */
    switch (jk) {
       case Ijk_Sys_syscall: case Ijk_ClientReq: case Ijk_NoRedir:
-      case Ijk_Yield: case Ijk_SigTRAP: {
+      case Ijk_Yield: case Ijk_SigTRAP: case Ijk_TInval: {
          HReg        r     = iselIntExpr_R(env, next);
          AMD64AMode* amRIP = AMD64AMode_IR(offsIP, hregAMD64_RBP());
          addInstr(env, AMD64Instr_XAssisted(r, amRIP, Acc_ALWAYS, jk));

diff --git a/VEX/priv/host_x86_isel.c b/VEX/priv/host_x86_isel.c
index bad28a11b417079b3f8808a70f651bc261bbdaed..2dd14ce391c96bb80507da3099cfb27c75c76d42 100644 (file)
--- a/VEX/priv/host_x86_isel.c
+++ b/VEX/priv/host_x86_isel.c
@@ -4171,7 +4171,7 @@ static void iselNext ( ISelEnv* env,
    /* Case: some other kind of transfer to any address */
    switch (jk) {
       case Ijk_Sys_int128: case Ijk_ClientReq: case Ijk_NoRedir:
-      case Ijk_Yield: case Ijk_SigTRAP: {
+      case Ijk_Yield: case Ijk_SigTRAP: case Ijk_TInval: {
          HReg      r     = iselIntExpr_R(env, next);
          X86AMode* amEIP = X86AMode_IR(offsIP, hregX86_EBP());
          addInstr(env, X86Instr_XAssisted(r, amEIP, Xcc_ALWAYS, jk));