]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
cns3xxx: reorganize patches, fix pcie io space init order
authorFelix Fietkau <nbd@openwrt.org>
Wed, 19 Sep 2012 23:50:02 +0000 (23:50 +0000)
committerFelix Fietkau <nbd@openwrt.org>
Wed, 19 Sep 2012 23:50:02 +0000 (23:50 +0000)
SVN-Revision: 33486

target/linux/cns3xxx/patches-3.3/052-cns3xxx_spi.patch
target/linux/cns3xxx/patches-3.3/055-cns3xxx_pci_iospace_init.patch [new file with mode: 0644]
target/linux/cns3xxx/patches-3.3/061-twd_base.patch [new file with mode: 0644]
target/linux/cns3xxx/patches-3.3/100-add_io_spaces.patch [new file with mode: 0644]
target/linux/cns3xxx/patches-3.3/104-cns3xxx_gpio.patch
target/linux/cns3xxx/patches-3.3/107-cns3xxx_pcie-section-mismatch-fixes.patch
target/linux/cns3xxx/patches-3.3/300-laguna_support.patch [moved from target/linux/cns3xxx/patches-3.3/100-laguna_support.patch with 91% similarity]

index 2818b49542745b7729ea63f3310cb608381cbb3d..bdaee06ea5b0265148be12bb666534a0bb548e77 100644 (file)
 +EXPORT_SYMBOL_GPL(cns3xxx_spi_tx_rx);
 --- a/include/linux/spi/spi.h
 +++ b/include/linux/spi/spi.h
-@@ -457,6 +457,13 @@ struct spi_transfer {
+@@ -508,6 +508,13 @@ struct spi_transfer {
        u32             speed_hz;
  
        struct list_head transfer_list;
diff --git a/target/linux/cns3xxx/patches-3.3/055-cns3xxx_pci_iospace_init.patch b/target/linux/cns3xxx/patches-3.3/055-cns3xxx_pci_iospace_init.patch
new file mode 100644 (file)
index 0000000..e70ef96
--- /dev/null
@@ -0,0 +1,76 @@
+--- a/arch/arm/mach-cns3xxx/cns3420vb.c
++++ b/arch/arm/mach-cns3xxx/cns3420vb.c
+@@ -32,6 +32,7 @@
+ #include <asm/mach/time.h>
+ #include <mach/cns3xxx.h>
+ #include <mach/irqs.h>
++#include <mach/platform.h>
+ #include "core.h"
+ #include "devices.h"
+@@ -199,6 +200,8 @@ static void __init cns3420_init(void)
+       cns3xxx_ahci_init();
+       cns3xxx_sdhci_init();
++      cns3xxx_pcie_init(0x3);
++
+       pm_power_off = cns3xxx_power_off;
+ }
+--- a/arch/arm/mach-cns3xxx/core.h
++++ b/arch/arm/mach-cns3xxx/core.h
+@@ -12,6 +12,8 @@
+ #define __CNS3XXX_CORE_H
+ extern struct sys_timer cns3xxx_timer;
++extern int cns3xxx_pcie_init(u8 bitmap);
++extern void cns3xxx_pcie_iotable_init(u8 bitmap);
+ #ifdef CONFIG_CACHE_L2X0
+ void __init cns3xxx_l2x0_init(void);
+--- a/arch/arm/mach-cns3xxx/pcie.c
++++ b/arch/arm/mach-cns3xxx/pcie.c
+@@ -365,7 +365,23 @@ static int cns3xxx_pcie_abort_handler(un
+       return 0;
+ }
+-static int __init cns3xxx_pcie_init(void)
++void __init cns3xxx_pcie_iotable_init(u8 bitmap)
++{
++      static int _iotable_init = 0;
++      int i;
++
++      bitmap &= ~_iotable_init;
++      for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
++              if (!(bitmap & (1 << i)))
++                      continue;
++
++              iotable_init(cns3xxx_pcie[i].cfg_bases,
++                           ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
++      }
++      _iotable_init |= bitmap;
++}
++
++int __init cns3xxx_pcie_init(u8 bitmap)
+ {
+       int i;
+@@ -375,9 +391,11 @@ static int __init cns3xxx_pcie_init(void
+       hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0,
+                       "imprecise external abort");
++      cns3xxx_pcie_iotable_init(bitmap);
+       for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
+-              iotable_init(cns3xxx_pcie[i].cfg_bases,
+-                           ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
++              if (!(bitmap & (1 << i)))
++                      continue;
++
+               cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
+               cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]);
+               pci_common_init(&cns3xxx_pcie[i].hw_pci);
+@@ -387,4 +405,3 @@ static int __init cns3xxx_pcie_init(void
+       return 0;
+ }
+-device_initcall(cns3xxx_pcie_init);
diff --git a/target/linux/cns3xxx/patches-3.3/061-twd_base.patch b/target/linux/cns3xxx/patches-3.3/061-twd_base.patch
new file mode 100644 (file)
index 0000000..f39dd45
--- /dev/null
@@ -0,0 +1,20 @@
+--- a/arch/arm/mach-cns3xxx/core.c
++++ b/arch/arm/mach-cns3xxx/core.c
+@@ -19,6 +19,7 @@
+ #include <asm/mach/time.h>
+ #include <asm/mach/irq.h>
+ #include <asm/hardware/gic.h>
++#include <asm/smp_twd.h>
+ #include <asm/hardware/cache-l2x0.h>
+ #include <mach/cns3xxx.h>
+ #include "core.h"
+@@ -63,6 +64,9 @@ static struct map_desc cns3xxx_io_desc[]
+ void __init cns3xxx_map_io(void)
+ {
++#ifdef CONFIG_LOCAL_TIMERS
++      twd_base = (void __iomem *) CNS3XXX_TC11MP_TWD_BASE_VIRT;
++#endif
+       iotable_init(cns3xxx_io_desc, ARRAY_SIZE(cns3xxx_io_desc));
+ }
diff --git a/target/linux/cns3xxx/patches-3.3/100-add_io_spaces.patch b/target/linux/cns3xxx/patches-3.3/100-add_io_spaces.patch
new file mode 100644 (file)
index 0000000..7e91779
--- /dev/null
@@ -0,0 +1,19 @@
+--- a/arch/arm/mach-cns3xxx/core.c
++++ b/arch/arm/mach-cns3xxx/core.c
+@@ -59,6 +59,16 @@ static struct map_desc cns3xxx_io_desc[]
+               .pfn            = __phys_to_pfn(CNS3XXX_PM_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
++      }, {
++              .virtual        = CNS3XXX_SWITCH_BASE_VIRT,
++              .pfn            = __phys_to_pfn(CNS3XXX_SWITCH_BASE),
++              .length         = SZ_4K,
++              .type           = MT_DEVICE,
++      }, {
++              .virtual        = CNS3XXX_SSP_BASE_VIRT,
++              .pfn            = __phys_to_pfn(CNS3XXX_SSP_BASE),
++              .length         = SZ_4K,
++              .type           = MT_DEVICE,
+       },
+ };
index 135247b54fb66dc1a050aa1346dd238e79e60fb4..a4d186c86889718f9c222b9428283fde995c7115 100644 (file)
@@ -96,7 +96,7 @@
  /* used by entry-macro.S */
 --- a/arch/arm/mach-cns3xxx/core.h
 +++ b/arch/arm/mach-cns3xxx/core.h
-@@ -20,7 +20,7 @@ void __init cns3xxx_l2x0_init(void);
+@@ -21,7 +21,7 @@ void __init cns3xxx_l2x0_init(void);
  static inline void cns3xxx_l2x0_init(void) {}
  #endif /* CONFIG_CACHE_L2X0 */
  
  void __init cns3xxx_init_irq(void);
  void cns3xxx_power_off(void);
  void cns3xxx_restart(char, const char *);
---- a/arch/arm/mach-cns3xxx/laguna.c
-+++ b/arch/arm/mach-cns3xxx/laguna.c
-@@ -612,7 +612,7 @@ static struct map_desc laguna_io_desc[] 
- static void __init laguna_map_io(void)
- {
--      cns3xxx_map_io();
-+      cns3xxx_common_init();
-       iotable_init(laguna_io_desc, ARRAY_SIZE(laguna_io_desc));
-       laguna_early_serial_setup();
- }
index d9095c79f85c9efbd5b2811dab06e304993326da..6d6385a477e614440eee015be5c6361cc56d762c 100644 (file)
  {
        return pci_scan_root_bus(NULL, sys->busnr, &cns3xxx_pcie_ops, sys,
                                 &sys->resources);
-@@ -365,7 +365,7 @@ static int cns3xxx_pcie_abort_handler(un
-       return 0;
- }
--int cns3xxx_pcie_init(u8 bitmap)
-+int __init cns3xxx_pcie_init(u8 bitmap)
- {
-       int i;
similarity index 91%
rename from target/linux/cns3xxx/patches-3.3/100-laguna_support.patch
rename to target/linux/cns3xxx/patches-3.3/300-laguna_support.patch
index 9f7bedeeb59789f847dda62ee6ebd5f7a88343bd..3d866c66691a4e11b1dcd4d77b7ea2c8ffa1e0e6 100644 (file)
@@ -1,6 +1,6 @@
 --- /dev/null
 +++ b/arch/arm/mach-cns3xxx/laguna.c
-@@ -0,0 +1,764 @@
+@@ -0,0 +1,765 @@
 +/*
 + * Gateworks Corporation Laguna Platform
 + *
 +
 +static void __init laguna_map_io(void)
 +{
-+      cns3xxx_map_io();
++      cns3xxx_common_init();
++      cns3xxx_pcie_iotable_init(0x3);
 +      iotable_init(laguna_io_desc, ARRAY_SIZE(laguna_io_desc));
 +      laguna_early_serial_setup();
 +}
 +        for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, I2C, GIG, etc.
 +
  endmenu
---- a/arch/arm/mach-cns3xxx/core.c
-+++ b/arch/arm/mach-cns3xxx/core.c
-@@ -19,6 +19,7 @@
- #include <asm/mach/time.h>
- #include <asm/mach/irq.h>
- #include <asm/hardware/gic.h>
-+#include <asm/smp_twd.h>
- #include <asm/hardware/cache-l2x0.h>
- #include <mach/cns3xxx.h>
- #include "core.h"
-@@ -58,11 +59,24 @@ static struct map_desc cns3xxx_io_desc[]
-               .pfn            = __phys_to_pfn(CNS3XXX_PM_BASE),
-               .length         = SZ_4K,
-               .type           = MT_DEVICE,
-+      }, {
-+              .virtual        = CNS3XXX_SWITCH_BASE_VIRT,
-+              .pfn            = __phys_to_pfn(CNS3XXX_SWITCH_BASE),
-+              .length         = SZ_4K,
-+              .type           = MT_DEVICE,
-+      }, {
-+              .virtual        = CNS3XXX_SSP_BASE_VIRT,
-+              .pfn            = __phys_to_pfn(CNS3XXX_SSP_BASE),
-+              .length         = SZ_4K,
-+              .type           = MT_DEVICE,
-       },
- };
- void __init cns3xxx_map_io(void)
- {
-+#ifdef CONFIG_LOCAL_TIMERS
-+      twd_base = (void __iomem *) CNS3XXX_TC11MP_TWD_BASE_VIRT;
-+#endif
-       iotable_init(cns3xxx_io_desc, ARRAY_SIZE(cns3xxx_io_desc));
- }
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -366,6 +366,7 @@ config ARCH_CLPS711X
  obj-$(CONFIG_SMP)                     += platsmp.o headsmp.o
  obj-$(CONFIG_HOTPLUG_CPU)             += hotplug.o
  obj-$(CONFIG_LOCAL_TIMERS)            += localtimer.o
---- a/arch/arm/mach-cns3xxx/pcie.c
-+++ b/arch/arm/mach-cns3xxx/pcie.c
-@@ -365,7 +365,7 @@ static int cns3xxx_pcie_abort_handler(un
-       return 0;
- }
--static int __init cns3xxx_pcie_init(void)
-+int cns3xxx_pcie_init(u8 bitmap)
- {
-       int i;
-@@ -376,6 +376,9 @@ static int __init cns3xxx_pcie_init(void
-                       "imprecise external abort");
-       for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
-+              if (!(bitmap & (1 << i)))
-+                      continue;
-+
-               iotable_init(cns3xxx_pcie[i].cfg_bases,
-                            ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
-               cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
-@@ -387,4 +390,3 @@ static int __init cns3xxx_pcie_init(void
-       return 0;
- }
--device_initcall(cns3xxx_pcie_init);
---- a/arch/arm/mach-cns3xxx/cns3420vb.c
-+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
-@@ -32,6 +32,7 @@
- #include <asm/mach/time.h>
- #include <mach/cns3xxx.h>
- #include <mach/irqs.h>
-+#include <mach/platform.h>
- #include "core.h"
- #include "devices.h"
-@@ -199,6 +200,8 @@ static void __init cns3420_init(void)
-       cns3xxx_ahci_init();
-       cns3xxx_sdhci_init();
-+      cns3xxx_pcie_init(0x3);
-+
-       pm_power_off = cns3xxx_power_off;
- }
---- a/arch/arm/mach-cns3xxx/core.h
-+++ b/arch/arm/mach-cns3xxx/core.h
-@@ -12,6 +12,7 @@
- #define __CNS3XXX_CORE_H
- extern struct sys_timer cns3xxx_timer;
-+extern int cns3xxx_pcie_init(u8 bitmap);
- #ifdef CONFIG_CACHE_L2X0
- void __init cns3xxx_l2x0_init(void);