Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a3238a3dc06ecb91536965a11636f84b251ae380..16725827d63898c8684a0f9a45357a9bf3269a09 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2025-07-27  Pan Li  <pan2.li@intel.com>
+
+       * config/riscv/riscv-v.cc (expand_vx_binary_vxrm_vec_vec_dup):
+       Add new case UNSPEC_VAADD.
+       (expand_vx_binary_vxrm_vec_dup_vec): Ditto.
+       * config/riscv/riscv.cc (riscv_rtx_costs): Ditto.
+       * config/riscv/vector-iterators.md: Add new case UNSPEC_VAADD to
+       iterator.
+
 2025-07-27  Nathaniel Shead  <nathanieloshead@gmail.com>
 
        PR middle-end/120855

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index bb710d568caa6e718e0fa3b6aae9b375a0ac17e9..8ad65ad54e83a44dd57d70c9782653964894653b 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250727
+20250728

diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 4c7e8d1fd8c9aaed8934acb43e98e07e3cb98bc4..52bd14cb273d8bd7b8fc8059a5da55ea7097a604 100644 (file)
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,26 @@
+2025-07-27  Mikael Morin  <mikael@gcc.gnu.org>
+
+       PR fortran/121185
+       * trans-expr.cc (gfc_trans_assignment_1): Use the same condition
+       to set the is_alloc_lhs flag and to decide to generate
+       reallocation code.  Add explicit call to gfc_fix_class_refs
+       before evaluating the condition.
+
+2025-07-27  Mikael Morin  <mikael@gcc.gnu.org>
+
+       PR fortran/121185
+       * trans-array.cc (set_factored_descriptor_value): Also trigger
+       the saving of the previously selected reference on encountering
+       an INDIRECT_REF.  Extract the saving code...
+       (save_ref): ... here as a new function.
+
+2025-07-27  Mikael Morin  <mikael@gcc.gnu.org>
+
+       PR fortran/121185
+       * trans-expr.cc (gfc_get_class_from_expr): Give up class
+       container lookup on the second COMPONENT_REF after an array
+       descriptor.
+
 2025-07-25  David Malcolm  <dmalcolm@redhat.com>
 
        * error.cc: Make diagnostics::context::m_source_printing private.

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 3b5f40c4ccbd6efb259dabc2f04a56ff9976a974..6d62009362168a906abe770449ab5988a8a03bf7 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,66 @@
+2025-07-27  Mikael Morin  <mikael@gcc.gnu.org>
+
+       PR fortran/121185
+       * gfortran.dg/assign_14.f90: New test.
+
+2025-07-27  Mikael Morin  <mikael@gcc.gnu.org>
+
+       PR fortran/121185
+       * gfortran.dg/assign_13.f90: New test.
+
+2025-07-27  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i16.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i32.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i64.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i8.c: New test.
+
+2025-07-27  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Add asm check.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto.
+
+2025-07-27  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test helper
+       macros.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
+       data for run test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i16.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i32.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i64.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i8.c: New test.
+
+2025-07-27  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f16.c:
+       Add zvfh requirements and options.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f16.c:
+       Ditto.
+
 2025-07-27  Nathaniel Shead  <nathanieloshead@gmail.com>
 
        * g++.dg/modules/class-11_a.H: New test.