tree-ssa-pre.c/115214(ICE in find_or_generate_expression, at tree-ssa-pre.c:2780...

Return NULL_TREE when genop3 equal EXACT_DIV_EXPR.
https://gcc.gnu.org/pipermail/gcc-patches/2024-May/652641.html

version log v3: remove additional POLY_INT_CST check.
https://gcc.gnu.org/pipermail/gcc-patches/2024-May/652795.html

gcc/ChangeLog:

	* tree-ssa-pre.cc (create_component_ref_by_pieces_1): New conditions.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/vsetvl/pr115214.c: New test.

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr115214.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr115214.c
new file mode 100644 (file)
index 0000000..fce2e9d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr115214.c
@@ -0,0 +1,52 @@
+/* { dg-do compile } */
+/* { dg-options "-mrvv-vector-bits=scalable -march=rv64gcv -mabi=lp64d -O3 -w" } */
+/* { dg-skip-if "" { *-*-* } { "-flto" } } */
+
+#include <riscv_vector.h>
+
+static inline __attribute__(()) int vaddq_f32();
+static inline __attribute__(()) int vload_tillz_f32(int nlane) {
+  vint32m1_t __trans_tmp_9;
+  {
+    int __trans_tmp_0 = nlane;
+    {
+      vint64m1_t __trans_tmp_1;
+      vint64m1_t __trans_tmp_2;
+      vint64m1_t __trans_tmp_3;
+      vint64m1_t __trans_tmp_4;
+      if (__trans_tmp_0 == 1) {
+        {
+          __trans_tmp_3 =
+              __riscv_vslideup_vx_i64m1(__trans_tmp_1, __trans_tmp_2, 1, 2);
+        }
+        __trans_tmp_4 = __trans_tmp_2;
+      }
+      __trans_tmp_4 = __trans_tmp_3;
+      __trans_tmp_9 = __riscv_vreinterpret_v_i64m1_i32m1(__trans_tmp_3);
+    }
+  }
+  return vaddq_f32(__trans_tmp_9); /* { dg-error {RVV type 'vint32m1_t' cannot be passed to an unprototyped function} } */
+}
+
+char CFLOAT_add_args[3];
+const int *CFLOAT_add_steps;
+const int CFLOAT_steps;
+
+__attribute__(()) void CFLOAT_add() {
+  char *b_src0 = &CFLOAT_add_args[0], *b_src1 = &CFLOAT_add_args[1],
+       *b_dst = &CFLOAT_add_args[2];
+  const float *src1 = (float *)b_src1;
+  float *dst = (float *)b_dst;
+  const int ssrc1 = CFLOAT_add_steps[1] / sizeof(float);
+  const int sdst = CFLOAT_add_steps[2] / sizeof(float);
+  const int hstep = 4 / 2;
+  vfloat32m1x2_t a;
+  int len = 255;
+  for (; len > 0; len -= hstep, src1 += 4, dst += 4) {
+    int b = vload_tillz_f32(len);
+    int r = vaddq_f32(a.__val[0], b); /* { dg-error {RVV type '__rvv_float32m1_t' cannot be passed to an unprototyped function} } */
+  }
+  for (; len > 0; --len, b_src0 += CFLOAT_steps,
+                  b_src1 += CFLOAT_add_steps[1], b_dst += CFLOAT_add_steps[2])
+    ;
+}

diff --git a/gcc/tree-ssa-pre.cc b/gcc/tree-ssa-pre.cc
index 75217f5cde1208f8390f5455d94ba9683f5e914f..5cf1968bc265c946dc36d4ffc71686e2b38c6ccd 100644 (file)
--- a/gcc/tree-ssa-pre.cc
+++ b/gcc/tree-ssa-pre.cc
@@ -2685,11 +2685,15 @@ create_component_ref_by_pieces_1 (basic_block block, vn_reference_t ref,
               here as the element alignment may be not visible.  See
               PR43783.  Simply drop the element size for constant
               sizes.  */
-           if (TREE_CODE (genop3) == INTEGER_CST
+           if ((TREE_CODE (genop3) == INTEGER_CST
                && TREE_CODE (TYPE_SIZE_UNIT (elmt_type)) == INTEGER_CST
                && wi::eq_p (wi::to_offset (TYPE_SIZE_UNIT (elmt_type)),
-                            (wi::to_offset (genop3)
-                             * vn_ref_op_align_unit (currop))))
+                            (wi::to_offset (genop3) * vn_ref_op_align_unit (currop))))
+             || (TREE_CODE (genop3) == EXACT_DIV_EXPR
+               && TREE_CODE (TREE_OPERAND (genop3, 1)) == INTEGER_CST
+               && operand_equal_p (TREE_OPERAND (genop3, 0), TYPE_SIZE_UNIT (elmt_type))
+               && wi::eq_p (wi::to_offset (TREE_OPERAND (genop3, 1)),
+                            vn_ref_op_align_unit (currop))))
              genop3 = NULL_TREE;
            else
              {