]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
i3c: mipi-i3c-hci: Prevent DMA enqueue while ring is aborting or in error
authorAdrian Hunter <adrian.hunter@intel.com>
Wed, 3 Jun 2026 09:07:40 +0000 (12:07 +0300)
committerAlexandre Belloni <alexandre.belloni@bootlin.com>
Sun, 14 Jun 2026 15:21:33 +0000 (17:21 +0200)
Block the DMA enqueue path while a Ring abort is in progress or after an
error condition has been detected.

Previously, new transfers could be enqueued while the DMA Ring was being
aborted or while error handling was underway. This allowed enqueue and
error-recovery paths to run concurrently, potentially interfering with
each other and corrupting Ring state.

Introduce explicit enqueue blocking and a wait queue to serialize access:
enqueue operations now wait until abort or error handling has completed
before proceeding. Enqueue is unblocked once the Ring is safely restarted.

Note, there is only 1 ring bundle configured, and a transfer error causes
the controller to halt ring (bundle) operation, so there is only ever 1
outstanding error at a time.  Furthermore, a later patch ensures that only
the currently active transfer list can time out.  Consequently, the DMA
queue will not be unblocked while there are outstanding transfer errors or
timeouts.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260603090754.16252-4-adrian.hunter@intel.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
drivers/i3c/master/mipi-i3c-hci/core.c
drivers/i3c/master/mipi-i3c-hci/dma.c
drivers/i3c/master/mipi-i3c-hci/hci.h

index afb0764b5e1fbb7094001e66e633164a4b26adb9..44617eb3a3f1dee35f65458f1815b28cda1a8ebd 100644 (file)
@@ -973,6 +973,7 @@ static int i3c_hci_probe(struct platform_device *pdev)
 
        spin_lock_init(&hci->lock);
        mutex_init(&hci->control_mutex);
+       init_waitqueue_head(&hci->enqueue_wait_queue);
 
        /*
         * Multi-bus instances share the same MMIO address range, but not
index bdffdd8b892368c07ba22a0060b1e872c1806491..c3da6eab8eaec8bd604ed14054a75d89cc28f577 100644 (file)
@@ -484,6 +484,12 @@ static int hci_dma_queue_xfer(struct i3c_hci *hci,
 
        spin_lock_irq(&hci->lock);
 
+       while (unlikely(hci->enqueue_blocked)) {
+               spin_unlock_irq(&hci->lock);
+               wait_event(hci->enqueue_wait_queue, !READ_ONCE(hci->enqueue_blocked));
+               spin_lock_irq(&hci->lock);
+       }
+
        if (n > rh->xfer_space) {
                spin_unlock_irq(&hci->lock);
                hci_dma_unmap_xfer(hci, xfer_list, n);
@@ -539,6 +545,14 @@ static int hci_dma_queue_xfer(struct i3c_hci *hci,
        return 0;
 }
 
+static void hci_dma_unblock_enqueue(struct i3c_hci *hci)
+{
+       if (hci->enqueue_blocked) {
+               hci->enqueue_blocked = false;
+               wake_up_all(&hci->enqueue_wait_queue);
+       }
+}
+
 static bool hci_dma_dequeue_xfer(struct i3c_hci *hci,
                                 struct hci_xfer *xfer_list, int n)
 {
@@ -550,12 +564,17 @@ static bool hci_dma_dequeue_xfer(struct i3c_hci *hci,
 
        guard(mutex)(&hci->control_mutex);
 
+       spin_lock_irq(&hci->lock);
+
        ring_status = rh_reg_read(RING_STATUS);
        if (ring_status & RING_STATUS_RUNNING) {
+               hci->enqueue_blocked = true;
+               spin_unlock_irq(&hci->lock);
                /* stop the ring */
                reinit_completion(&rh->op_done);
                rh_reg_write(RING_CONTROL, rh_reg_read(RING_CONTROL) | RING_CTRL_ABORT);
                wait_for_completion_timeout(&rh->op_done, HZ);
+               spin_lock_irq(&hci->lock);
                ring_status = rh_reg_read(RING_STATUS);
                if (ring_status & RING_STATUS_RUNNING) {
                        /*
@@ -567,8 +586,6 @@ static bool hci_dma_dequeue_xfer(struct i3c_hci *hci,
                }
        }
 
-       spin_lock_irq(&hci->lock);
-
        for (i = 0; i < n; i++) {
                struct hci_xfer *xfer = xfer_list + i;
                int idx = xfer->ring_entry;
@@ -604,6 +621,8 @@ static bool hci_dma_dequeue_xfer(struct i3c_hci *hci,
        rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE);
        rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE | RING_CTRL_RUN_STOP);
 
+       hci_dma_unblock_enqueue(hci);
+
        spin_unlock_irq(&hci->lock);
 
        return did_unqueue;
@@ -647,6 +666,8 @@ static void hci_dma_xfer_done(struct i3c_hci *hci, struct hci_rh_data *rh)
                        }
                        if (xfer->completion)
                                complete(xfer->completion);
+                       if (RESP_STATUS(resp))
+                               hci->enqueue_blocked = true;
                }
 
                done_ptr = (done_ptr + 1) % rh->xfer_entries;
index f17f43494c1b5245458f481490345856cc5be4e1..d630400ec94590104f45732bb3513ba5c47c1fac 100644 (file)
@@ -54,6 +54,8 @@ struct i3c_hci {
        struct mutex control_mutex;
        atomic_t next_cmd_tid;
        bool irq_inactive;
+       bool enqueue_blocked;
+       wait_queue_head_t enqueue_wait_queue;
        u32 caps;
        unsigned int quirks;
        unsigned int DAT_entries;