drm/amdgpu: Use correct address to setup gart page table for vram access

Use dst input parameter to setup gart page table entries instead of using fixed
location.

Fixes: 237d623ae659 ("drm/amdgpu/gart: Add helper to bind VRAM pages (v2)")
Signed-off-by: Xiaogang Chen <xiaogang.chen@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index 16c3b78e50cbc59367bb618a0de0f7e8ba7fed91..ec911dce345ffe1f9b6dca1c09ed72aa53991222 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -375,7 +375,7 @@ void amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
  * @start_page: first page to map in the GART aperture
  * @num_pages: number of pages to be mapped
  * @flags: page table entry flags
- * @dst: CPU address of the GART table
+ * @dst: valid CPU address of GART table, cannot be null
  *
  * Binds a BO that is allocated in VRAM to the GART page table
  * (all ASICs).
@@ -396,7 +396,7 @@ void amdgpu_gart_map_vram_range(struct amdgpu_device *adev, uint64_t pa,
                return;
 
        for (i = 0; i < num_pages; ++i) {
-               amdgpu_gmc_set_pte_pde(adev, adev->gart.ptr,
+               amdgpu_gmc_set_pte_pde(adev, dst,
                        start_page + i, pa + AMDGPU_GPU_PAGE_SIZE * i, flags);
        }