struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- return DISPLAY_VER(display) < 4 ||
+ return intel_plane_needs_fence(display) ||
(plane->fbc && !plane_state->no_fbc_reason &&
i915_gtt_view_is_normal(&plane_state->view.gtt));
}
DISPLAY_INFO(display)->cursor_needs_physical;
}
+bool intel_plane_needs_fence(struct intel_display *display)
+{
+ /*
+ * pre-i965 planes use the fence for tiled scanout.
+ * i965+ planes have their own tiled scanout control bit.
+ */
+ return DISPLAY_VER(display) < 4;
+}
+
bool intel_plane_can_async_flip(struct intel_plane *plane,
const struct drm_format_info *info,
u64 modifier)
void intel_plane_helper_add(struct intel_plane *plane);
bool intel_plane_needs_low_address(struct intel_display *display);
bool intel_plane_needs_physical(struct intel_plane *plane);
+bool intel_plane_needs_fence(struct intel_display *display);
void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_state,
struct intel_plane_state *new_plane_state);
int intel_plane_add_affected(struct intel_atomic_state *state,
* mode that matches the user configuration.
*/
ret = i915_vma_pin_fence(vma);
- if (ret != 0 && DISPLAY_VER(display) < 4) {
+ if (ret != 0 && intel_plane_needs_fence(display)) {
i915_vma_unpin(vma);
goto err_unpin;
}