]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
soc: qcom: ubwc: Fix SM6125's ubwc_swizzle value
authorKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Thu, 26 Jun 2025 09:02:38 +0000 (11:02 +0200)
committerRob Clark <robin.clark@oss.qualcomm.com>
Sat, 5 Jul 2025 00:48:40 +0000 (17:48 -0700)
The value of 7 (a.k.a. GENMASK(2, 0), a.k.a. disabling levels 1-3 of
swizzling) is what we want on this platform (and others with a UBWC
1.0 encoder).

Fix it to make mesa happy (the hardware doesn't care about the 2 higher
bits, as they weren't consumed on this platform).

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/660980/
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
drivers/soc/qcom/ubwc_config.c

index 18a853a3f76cc71dc6c2665c6b7486eb936331f6..3eb2f2118e5d1ca69cad2ed092542920537ff62c 100644 (file)
@@ -103,7 +103,7 @@ static const struct qcom_ubwc_cfg_data sm6115_data = {
 static const struct qcom_ubwc_cfg_data sm6125_data = {
        .ubwc_enc_version = UBWC_1_0,
        .ubwc_dec_version = UBWC_3_0,
-       .ubwc_swizzle = 1,
+       .ubwc_swizzle = 7,
        .highest_bank_bit = 14,
 };