]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
mediatek: filogic: mt-stuart: move AQR113C reset to MDIO bus level
authorChad Monroe <chad@monroe.io>
Tue, 11 Aug 2026 02:57:56 +0000 (19:57 -0700)
committerJonas Jelonek <jelonek.jonas@gmail.com>
Tue, 11 Aug 2026 20:13:09 +0000 (22:13 +0200)
Each board wires one reset line that resets the AQR113C PHYs as a
group: GPIO 71 on SDG-8733/SDG-8734 and GPIO 62 on SDG-8733A.
Describe that line as the MDIO bus reset with the same assert and
deassert times.

Drop the per-PHY reset-gpios. On SDG-8733 the second AQR113C
claimed GPIO 62, which is not connected on that board.

Signed-off-by: Chad Monroe <chad@monroe.io>
Link: https://github.com/openwrt/openwrt/pull/24352
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
target/linux/mediatek/dts/mt7988a-smartrg-SDG-8733.dtsi
target/linux/mediatek/dts/mt7988a-smartrg-mt-stuart-phase1.dtsi
target/linux/mediatek/dts/mt7988d-smartrg-SDG-8733A.dts

index 604ab4d357c03f817d014e278c4684685b05cc85..6608286601d0a28c1a77b5e7f1f7e9961c546279 100644 (file)
                compatible = "ethernet-phy-ieee802.3-c45";
                reg = <0>;
 
-               reset-gpios = <&pio 62 GPIO_ACTIVE_LOW>;
-               reset-assert-us = <100000>;
-               reset-deassert-us = <1000000>;
-
                leds {
                        #address-cells = <1>;
                        #size-cells = <0>;
index 70f8a0af3e25d85ef1cfd5c9e264a657859a19b9..d85cd0b2dcd4a95d232adc7bd275d2f2e666fc92 100644 (file)
 };
 
 &mdio_bus {
+       reset-gpios = <&pio 71 GPIO_ACTIVE_LOW>;
+       reset-delay-us = <100000>;
+       reset-post-delay-us = <1000000>;
+
        phy8: ethernet-phy@8 {
                /* AQR113C */
                compatible = "ethernet-phy-ieee802.3-c45";
                reg = <8>;
 
-               reset-gpios = <&pio 71 GPIO_ACTIVE_LOW>;
-               reset-assert-us = <100000>;
-               reset-deassert-us = <1000000>;
-
                leds {
                        #address-cells = <1>;
                        #size-cells = <0>;
index 9b4f4956b86fba3080efbc87c7ce2ba554adebaf..1e7b72e701587062c04f6adba19dc7dcba5d6cad 100644 (file)
 };
 
 &mdio_bus {
+       reset-gpios = <&pio 62 GPIO_ACTIVE_LOW>;
+       reset-delay-us = <100000>;
+       reset-post-delay-us = <1000000>;
+
        phy8: ethernet-phy@8 {
                /* AQR113C */
                compatible = "ethernet-phy-ieee802.3-c45";
                reg = <8>;
 
-               reset-gpios = <&pio 62 GPIO_ACTIVE_LOW>;
-               reset-assert-us = <100000>;
-               reset-deassert-us = <1000000>;
-
                marvell,mdi-cfg-order = <0>;
 
                leds {