re PR target/7842 ([REGRESSION] sparc code gen bug)

2002-09-25  David S. Miller  <davem@redhat.com>

	PR target/7842
	* config/sparc/sparc.c (set_extends): SImode ASHIFT does not
	extend.

From-SVN: r57537

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0b9583504323b710f83e3d4afc84e9253dc93e29..928a1bcc3bbb12c81f1cdb3f5b14c83889592f3f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2002-09-25  David S. Miller  <davem@redhat.com>
+
+       PR target/7842
+       * config/sparc/sparc.c (set_extends): SImode ASHIFT does not
+       extend.
+
 2002-09-20  Jeroen Dobbelaere  <jeroen.dobbelaere@acunia.com>
 
        * config/arm/arm.md (sign_extract_onebit, not_signextract_onebit):

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 6ef28141ce4043e5030c0bd4a2dbe733d7a1731b..c23cbef1be529327fb22007f1d3630ccffb69938 100644 (file)
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -8650,7 +8650,6 @@ set_extends (insn)
          return INTVAL (op1) >= 0;
        return (GET_CODE (op1) == REG && sparc_check_64 (op1, insn) == 1);
       }
-    case ASHIFT:
     case LSHIFTRT:
       return GET_MODE (SET_SRC (pat)) == SImode;
       /* Positive integers leave the high bits zero.  */