mips.c (save_restore_insns): If gp_offset or fp_offset are large_int...

        * mips/mips.c (save_restore_insns): If gp_offset or fp_offset are
        large_int, emit two insns instead of one splitable insn.
        * dwarf2out.c (dwarf2out_frame_debug): When set cfa_store_offset
        from cfa_temp_value, use cfa_offset.  Abort if cfa_reg is not SP.

From-SVN: r16576

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b495b097c9a8a243135afc323ed1b2f784e3ed92..c11a34f8275c06451fa7eee12618df9b1a16bc90 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+Tue Nov 18 22:50:24 1997  Jim Wilson  <wilson@cygnus.com>
+
+       * mips/mips.c (save_restore_insns): If gp_offset or fp_offset are
+       large_int, emit two insns instead of one splitable insn.
+       * dwarf2out.c (dwarf2out_frame_debug): When set cfa_store_offset
+       from cfa_temp_value, use cfa_offset.  Abort if cfa_reg is not SP.
+
 Fri Nov  7 15:33:11 1997  Robert Lipe (robertl@dgii.com)
 
         * i386/sco5.h (HAVE_ATEXIT): Delete definition.

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 28650fa6b134f2b48752bb6aeaeb8f2980f743f0..79fe3261b848abf9fa39f87089f847e422f747c2 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -5008,9 +5008,32 @@ save_restore_insns (store_p, large_reg, large_offset, file)
          base_offset  = gp_offset;
          if (file == (FILE *)0)
            {
-             insn = emit_move_insn (base_reg_rtx, GEN_INT (gp_offset));
-             if (store_p)
-               RTX_FRAME_RELATED_P (insn) = 1;
+             rtx gp_offset_rtx = GEN_INT (gp_offset);
+
+             /* Instruction splitting doesn't preserve the RTX_FRAME_RELATED_P
+                bit, so make sure that we don't emit anything that can be
+                split.  */
+             /* ??? There is no DImode ori immediate pattern, so we can only
+                do this for 32 bit code.  */
+             if (large_int (gp_offset_rtx)
+                 && GET_MODE (base_reg_rtx) == SImode)
+               {
+                 insn = emit_move_insn (base_reg_rtx,
+                                        GEN_INT (gp_offset & 0xffff0000));
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+                 insn = emit_insn (gen_iorsi3 (base_reg_rtx, base_reg_rtx,
+                                               GEN_INT (gp_offset & 0x0000ffff)));
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+               }
+             else
+               {
+                 insn = emit_move_insn (base_reg_rtx, gp_offset_rtx);
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+               }
+
              if (TARGET_LONG64)
                insn = emit_insn (gen_adddi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx));
              else
@@ -5128,7 +5151,32 @@ save_restore_insns (store_p, large_reg, large_offset, file)
          base_offset  = fp_offset;
          if (file == (FILE *)0)
            {
-             insn = emit_move_insn (base_reg_rtx, GEN_INT (fp_offset));
+             rtx fp_offset_rtx = GEN_INT (fp_offset);
+
+             /* Instruction splitting doesn't preserve the RTX_FRAME_RELATED_P
+                bit, so make sure that we don't emit anything that can be
+                split.  */
+             /* ??? There is no DImode ori immediate pattern, so we can only
+                do this for 32 bit code.  */
+             if (large_int (fp_offset_rtx)
+                 && GET_MODE (base_reg_rtx) == SImode)
+               {
+                 insn = emit_move_insn (base_reg_rtx,
+                                        GEN_INT (fp_offset & 0xffff0000));
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+                 insn = emit_insn (gen_iorsi3 (base_reg_rtx, base_reg_rtx,
+                                               GEN_INT (fp_offset & 0x0000ffff)));
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+               }
+             else
+               {
+                 insn = emit_move_insn (base_reg_rtx, fp_offset_rtx);
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+               }
+
              if (store_p)
                RTX_FRAME_RELATED_P (insn) = 1;
              if (TARGET_LONG64)

diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
index 0ec8924c8e9eab3ca864b9ff72d4e9fd6f11caa3..af19699b2acaa4707178d9700600eb72b7ca1467 100644 (file)
--- a/gcc/dwarf2out.c
+++ b/gcc/dwarf2out.c
@@ -1185,8 +1185,10 @@ dwarf2out_frame_debug (insn)
              if (GET_CODE (XEXP (src, 0)) != REG
                  || REGNO (XEXP (src, 0)) != cfa_temp_reg)
                abort ();
+             if (cfa_reg != STACK_POINTER_REGNUM)
+               abort ();
              cfa_store_reg = REGNO (dest);
-             cfa_store_offset -= cfa_temp_value;
+             cfa_store_offset = cfa_offset - cfa_temp_value;
            }
          break;