]> git.ipfire.org Git - thirdparty/suricata.git/commitdiff
dpdk: add a check for HW checksum validation offload
authorLukas Sismis <lsismis@oisf.net>
Wed, 21 Sep 2022 14:15:18 +0000 (16:15 +0200)
committerVictor Julien <vjulien@oisf.net>
Tue, 24 Jan 2023 09:44:49 +0000 (10:44 +0100)
Ticket: #5553

src/decode.h
src/runmode-dpdk.c
src/source-dpdk.c

index ca81e3457cd1e4168bd68a6f0324b9abe8c19b21..dfa8af0f015d48000ad913a7c62f4d5593ecc384 100644 (file)
 #include "util-napatech.h"
 #endif /* HAVE_NAPATECH */
 
-
 typedef enum {
     CHECKSUM_VALIDATION_DISABLE,
     CHECKSUM_VALIDATION_ENABLE,
     CHECKSUM_VALIDATION_AUTO,
     CHECKSUM_VALIDATION_RXONLY,
     CHECKSUM_VALIDATION_KERNEL,
+    CHECKSUM_VALIDATION_OFFLOAD,
 } ChecksumValidationMode;
 
 enum PktSrcEnum {
index 4a317b316c29187777b7335e042bfa5cdb67d62d..08923abd64d563da4c7f2cb5359baf5decb44df1 100644 (file)
@@ -1210,7 +1210,7 @@ static int DeviceConfigure(DPDKIfaceConfig *iconf)
     DeviceInitPortConf(iconf, &dev_info, &port_conf);
     if (port_conf.rxmode.offloads & DEV_RX_OFFLOAD_CHECKSUM) {
         // Suricata does not need recalc checksums now
-        iconf->checksum_mode = CHECKSUM_VALIDATION_DISABLE;
+        iconf->checksum_mode = CHECKSUM_VALIDATION_OFFLOAD;
     }
 
     retval = rte_eth_dev_configure(
index ee28913003844ca67df5bdbef38583e1203ea85a..6bdd3167b8901a992c3b26efa4fcfda2cc3d7c8c 100644 (file)
@@ -385,6 +385,28 @@ static TmEcode ReceiveDPDKLoop(ThreadVars *tv, void *data, void *slot)
             p->dpdk_v.copy_mode = ptv->copy_mode;
             p->dpdk_v.out_port_id = ptv->out_port_id;
             p->dpdk_v.out_queue_id = ptv->queue_id;
+            p->livedev = ptv->livedev;
+
+            if (ptv->checksum_mode == CHECKSUM_VALIDATION_DISABLE) {
+                p->flags |= PKT_IGNORE_CHECKSUM;
+            } else if (ptv->checksum_mode == CHECKSUM_VALIDATION_OFFLOAD) {
+                uint64_t ol_flags = ptv->received_mbufs[i]->ol_flags;
+                if ((ol_flags & RTE_MBUF_F_RX_IP_CKSUM_MASK) == RTE_MBUF_F_RX_IP_CKSUM_GOOD &&
+                        (ol_flags & RTE_MBUF_F_RX_L4_CKSUM_MASK) == RTE_MBUF_F_RX_L4_CKSUM_GOOD) {
+                    SCLogDebug("HW detected GOOD IP and L4 chsum, ignoring validation");
+                    p->flags |= PKT_IGNORE_CHECKSUM;
+                } else {
+                    if ((ol_flags & RTE_MBUF_F_RX_IP_CKSUM_MASK) == RTE_MBUF_F_RX_IP_CKSUM_BAD) {
+                        SCLogDebug("HW detected BAD IP checksum");
+                        // chsum recalc will not be triggered but rule keyword check will be
+                        p->level3_comp_csum = 0;
+                    }
+                    if ((ol_flags & RTE_MBUF_F_RX_L4_CKSUM_MASK) == RTE_MBUF_F_RX_L4_CKSUM_BAD) {
+                        SCLogDebug("HW detected BAD L4 chsum");
+                        p->level4_comp_csum = 0;
+                    }
+                }
+            }
 
             PacketSetData(p, rte_pktmbuf_mtod(p->dpdk_v.mbuf, uint8_t *),
                     rte_pktmbuf_pkt_len(p->dpdk_v.mbuf));