PCI: tegra194: Fix possible array out of bounds access

[ Upstream commit 205b3d02d57ce6dce96f6d2b9c230f56a9bf9817 ]

Add check to fix the possible array out of bounds violation by
making speed equal to GEN1_CORE_CLK_FREQ when its value is more
than the size of "pcie_gen_freq" array. This array has size of
four but possible speed (CLS) values are from "0 to 0xF". So,
"speed - 1" values are "-1 to 0xE".

Suggested-by: Bjorn Helgaas <helgaas@kernel.org>
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Link: https://lore.kernel.org/lkml/72b9168b-d4d6-4312-32ea-69358df2f2d0@nvidia.com/
Acked-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index bdd84765e64602912e90b6abca3bf7918a4a848a..765abe07322829c65556b21471d6c5eb70467e90 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -239,6 +239,7 @@
 #define EP_STATE_ENABLED       1
 
 static const unsigned int pcie_gen_freq[] = {
+       GEN1_CORE_CLK_FREQ,     /* PCI_EXP_LNKSTA_CLS == 0; undefined */
        GEN1_CORE_CLK_FREQ,
        GEN2_CORE_CLK_FREQ,
        GEN3_CORE_CLK_FREQ,
@@ -452,7 +453,11 @@ static irqreturn_t tegra_pcie_ep_irq_thread(int irq, void *arg)
 
        speed = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA) &
                PCI_EXP_LNKSTA_CLS;
-       clk_set_rate(pcie->core_clk, pcie_gen_freq[speed - 1]);
+
+       if (speed >= ARRAY_SIZE(pcie_gen_freq))
+               speed = 0;
+
+       clk_set_rate(pcie->core_clk, pcie_gen_freq[speed]);
 
        /* If EP doesn't advertise L1SS, just return */
        val = dw_pcie_readl_dbi(pci, pcie->cfg_link_cap_l1sub);
@@ -989,7 +994,11 @@ retry_link:
 
        speed = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA) &
                PCI_EXP_LNKSTA_CLS;
-       clk_set_rate(pcie->core_clk, pcie_gen_freq[speed - 1]);
+
+       if (speed >= ARRAY_SIZE(pcie_gen_freq))
+               speed = 0;
+
+       clk_set_rate(pcie->core_clk, pcie_gen_freq[speed]);
 
        tegra_pcie_enable_interrupts(pp);