drm/amdgpu: Limit physical transcation mode to A + A only

Only enable page table walker to snoop CPU cache
on A + A platform

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
index 4aa004ee2c4d9366ca524cd878e60b037c76621f..6a6f1707cb53e3457cd3929c298a4f7203ac84cf 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
@@ -325,10 +325,18 @@ static void gfxhub_v12_1_xcc_init_cache_regs(struct amdgpu_device *adev,
                WREG32_SOC15_RLC(GC, GET_INST(GC, i), regGCVM_L2_CNTL3, tmp);
 
                tmp = regGCVM_L2_CNTL4_DEFAULT;
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
-                                   VMC_TAP_PDE_REQUEST_PHYSICAL, 1);
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
-                                   VMC_TAP_PTE_REQUEST_PHYSICAL, 1);
+               if (adev->gmc.xgmi.connected_to_cpu) {
+                       tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
+                                           VMC_TAP_PDE_REQUEST_PHYSICAL, 1);
+                       tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
+                                           VMC_TAP_PTE_REQUEST_PHYSICAL, 1);
+               } else {
+                       tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
+                                           VMC_TAP_PDE_REQUEST_PHYSICAL, 0);
+                       tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4,
+                                           VMC_TAP_PTE_REQUEST_PHYSICAL, 0);
+               }
+
                WREG32_SOC15_RLC(GC, GET_INST(GC, i), regGCVM_L2_CNTL4, tmp);
 
                tmp = regGCVM_L2_CNTL5_DEFAULT;