+++ /dev/null
-From 9163fe4d790fb4e16d6b0e23f55b43cddd3d4a65 Mon Sep 17 00:00:00 2001
-From: Prike Liang <Prike.Liang@amd.com>
-Date: Fri, 9 Jan 2026 16:15:11 +0800
-Subject: Revert "drm/amdgpu: don't attach the tlb fence for SI"
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Prike Liang <Prike.Liang@amd.com>
-
-commit 9163fe4d790fb4e16d6b0e23f55b43cddd3d4a65 upstream.
-
-This reverts commit 820b3d376e8a102c6aeab737ec6edebbbb710e04.
-
-It’s better to validate VM TLB flushes in the flush‑TLB backend
-rather than in the generic VM layer.
-
-Reverting this patch depends on
-commit fa7c231fc2b0 ("drm/amdgpu: validate the flush_gpu_tlb_pasid()")
-being present in the tree.
-
-Signed-off-by: Prike Liang <Prike.Liang@amd.com>
-Reviewed-by: Christian König <christian.koenig@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 +---
- 1 file changed, 1 insertion(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
-+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
-@@ -1066,9 +1066,7 @@ amdgpu_vm_tlb_flush(struct amdgpu_vm_upd
- }
-
- /* Prepare a TLB flush fence to be attached to PTs */
-- if (!params->unlocked &&
-- /* SI doesn't support pasid or KIQ/MES */
-- params->adev->family > AMDGPU_FAMILY_SI) {
-+ if (!params->unlocked) {
- amdgpu_vm_tlb_fence_create(params->adev, vm, fence);
-
- /* Makes sure no PD/PT is freed before the flush */
drm-amd-display-clear-hdmi-hpd-pending-work-only-if-it-is-enabled.patch
net-stmmac-dwmac-loongson-set-clk_csr_i-to-100-150mhz.patch
drm-amd-display-add-an-hdmi_hpd_debounce_delay_ms-module.patch
-revert-drm-amdgpu-don-t-attach-the-tlb-fence-for-si.patch
ata-libata-eh-correctly-handle-deferred-qc-timeouts.patch
ata-libata-core-fix-cancellation-of-a-port-deferred-qc-work.patch
+++ /dev/null
-From dbfc19b5702978fa4b17e252cbbccb9dfefa4786 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 2 Dec 2025 14:24:03 -0500
-Subject: drm/amdgpu: don't attach the tlb fence for SI
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Alex Deucher <alexander.deucher@amd.com>
-
-[ Upstream commit 820b3d376e8a102c6aeab737ec6edebbbb710e04 ]
-
-SI hardware doesn't support pasids, user mode queues, or
-KIQ/MES so there is no need for this. Doing so results in
-a segfault as these callbacks are non-existent for SI.
-
-Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4744
-Fixes: f3854e04b708 ("drm/amdgpu: attach tlb fence to the PTs update")
-Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
-index a67285118c37b..c362d4dfb5bbb 100644
---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
-+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
-@@ -1069,7 +1069,9 @@ amdgpu_vm_tlb_flush(struct amdgpu_vm_update_params *params,
- }
-
- /* Prepare a TLB flush fence to be attached to PTs */
-- if (!params->unlocked) {
-+ if (!params->unlocked &&
-+ /* SI doesn't support pasid or KIQ/MES */
-+ params->adev->family > AMDGPU_FAMILY_SI) {
- amdgpu_vm_tlb_fence_create(params->adev, vm, fence);
-
- /* Makes sure no PD/PT is freed before the flush */
---
-2.51.0
-
+++ /dev/null
-From 9163fe4d790fb4e16d6b0e23f55b43cddd3d4a65 Mon Sep 17 00:00:00 2001
-From: Prike Liang <Prike.Liang@amd.com>
-Date: Fri, 9 Jan 2026 16:15:11 +0800
-Subject: Revert "drm/amdgpu: don't attach the tlb fence for SI"
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Prike Liang <Prike.Liang@amd.com>
-
-commit 9163fe4d790fb4e16d6b0e23f55b43cddd3d4a65 upstream.
-
-This reverts commit 820b3d376e8a102c6aeab737ec6edebbbb710e04.
-
-It’s better to validate VM TLB flushes in the flush‑TLB backend
-rather than in the generic VM layer.
-
-Reverting this patch depends on
-commit fa7c231fc2b0 ("drm/amdgpu: validate the flush_gpu_tlb_pasid()")
-being present in the tree.
-
-Signed-off-by: Prike Liang <Prike.Liang@amd.com>
-Reviewed-by: Christian König <christian.koenig@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 +---
- 1 file changed, 1 insertion(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
-+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
-@@ -1069,9 +1069,7 @@ amdgpu_vm_tlb_flush(struct amdgpu_vm_upd
- }
-
- /* Prepare a TLB flush fence to be attached to PTs */
-- if (!params->unlocked &&
-- /* SI doesn't support pasid or KIQ/MES */
-- params->adev->family > AMDGPU_FAMILY_SI) {
-+ if (!params->unlocked) {
- amdgpu_vm_tlb_fence_create(params->adev, vm, fence);
-
- /* Makes sure no PD/PT is freed before the flush */
drm-panthor-remove-redundant-call-to-disable-the-mcu.patch
drm-panthor-fix-queue_reset_timeout_locked.patch
workqueue-process-rescuer-work-items-one-by-one-usin.patch
-drm-amdgpu-don-t-attach-the-tlb-fence-for-si.patch
drm-panthor-fix-panthor_gpu_coherency_set.patch
accel-amdxdna-fix-race-condition-when-checking-rpm_o.patch
accel-amdxdna-fix-cu_idx-being-cleared-by-memset-dur.patch
drm-exynos-vidi-fix-to-avoid-directly-dereferencing-user-pointer.patch
drivers-hv-vmbus-use-kthread-for-vmbus-interrupts-on-preempt_rt.patch
net-stmmac-dwmac-loongson-set-clk_csr_i-to-100-150mhz.patch
-revert-drm-amdgpu-don-t-attach-the-tlb-fence-for-si.patch
ata-libata-eh-correctly-handle-deferred-qc-timeouts.patch
ata-libata-core-fix-cancellation-of-a-port-deferred-qc-work.patch