amdgcn: Fix vector min/max ICE

The DImode min/max instructions need a clobber that SImode does not, so
add the special case to the reduction expand code.

gcc/ChangeLog:

	* config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode
	min/max instructions.

diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp
index c0a30ee6076b4f8405e939b1ebe3ecf5a1ae643b..02f3ac2c105fb3cb67383b03775d33869a2b894f 100644 (file)
--- a/gcc/ChangeLog.omp
+++ b/gcc/ChangeLog.omp
@@ -1,3 +1,11 @@
+2023-11-10  Andrew Stubbs  <ams@codesourcery.com>
+
+       Backport from mainline:
+       Andrew Stubbs  <ams@codesourcery.com>
+
+       * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode
+       min/max instructions.
+
 2023-11-10  Andrew Stubbs  <ams@codesourcery.com>
 
        Backport from mainline:

diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index 02964b05db3351beead3b661ebaf5137feb20148..eb1232ade5c93f76b32b7e1074d45b1d4a94380c 100644 (file)
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -5553,7 +5553,15 @@ gcn_expand_reduc_scalar (machine_mode mode, rtx src, int unspec)
        {
          rtx tmp = gen_reg_rtx (mode);
          emit_insn (gen_dpp_move (mode, tmp, in, shift_val));
-         emit_insn (gen_rtx_SET (out, gen_rtx_fmt_ee (code, mode, tmp, in)));
+         rtx insn = gen_rtx_SET (out, gen_rtx_fmt_ee (code, mode, tmp, in));
+         if (scalar_mode == DImode)
+           {
+             rtx clobber = gen_rtx_CLOBBER (VOIDmode,
+                                            gen_rtx_REG (DImode, VCC_REG));
+             insn = gen_rtx_PARALLEL (VOIDmode,
+                                      gen_rtvec (2, insn, clobber));
+           }
+         emit_insn (insn);
        }
       else
        {