cpufreq: Add Hygon Dhyana support

The Hygon Dhyana CPU supports ACPI P-States, and there is SMBus device
(PCI device ID 0x790b) on the Hygon platform. Add Hygon Dhyana support
to the cpufreq driver by using the code path of AMD family 17h.

Signed-off-by: Pu Wen <puwen@hygon.cn>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: rjw@rjwysocki.net
Cc: viresh.kumar@linaro.org
Cc: bp@alien8.de
Cc: tglx@linutronix.de
Cc: mingo@redhat.com
Cc: hpa@zytor.com
Cc: x86@kernel.org
Cc: thomas.lendacky@amd.com
Cc: rafael@kernel.org
Cc: linux-pm@vger.kernel.org
Link: https://lkml.kernel.org/r/4db6f0f8537a93c172430c446a0297a6ab1c3c2d.1537533369.git.puwen@hygon.cn

diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c
index b61f4ec43e0685f6b1ea28035cff16a19a8247d9..d62fd374d5c70f58fdd4fb7c874584a00dc00c16 100644 (file)
--- a/drivers/cpufreq/acpi-cpufreq.c
+++ b/drivers/cpufreq/acpi-cpufreq.c
@@ -61,6 +61,7 @@ enum {
 
 #define INTEL_MSR_RANGE                (0xffff)
 #define AMD_MSR_RANGE          (0x7)
+#define HYGON_MSR_RANGE                (0x7)
 
 #define MSR_K7_HWCR_CPB_DIS    (1ULL << 25)
 
@@ -95,6 +96,7 @@ static bool boost_state(unsigned int cpu)
                rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
                msr = lo | ((u64)hi << 32);
                return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
+       case X86_VENDOR_HYGON:
        case X86_VENDOR_AMD:
                rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
                msr = lo | ((u64)hi << 32);
@@ -113,6 +115,7 @@ static int boost_set_msr(bool enable)
                msr_addr = MSR_IA32_MISC_ENABLE;
                msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
                break;
+       case X86_VENDOR_HYGON:
        case X86_VENDOR_AMD:
                msr_addr = MSR_K7_HWCR;
                msr_mask = MSR_K7_HWCR_CPB_DIS;
@@ -225,6 +228,8 @@ static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr)
 
        if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
                msr &= AMD_MSR_RANGE;
+       else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
+               msr &= HYGON_MSR_RANGE;
        else
                msr &= INTEL_MSR_RANGE;
 

diff --git a/drivers/cpufreq/amd_freq_sensitivity.c b/drivers/cpufreq/amd_freq_sensitivity.c
index be926d9a66e574604758fb40300504bec9ca3039..4ac7c3cf34bef93ab2070d1c5f69a7c3a8b0ec25 100644 (file)
--- a/drivers/cpufreq/amd_freq_sensitivity.c
+++ b/drivers/cpufreq/amd_freq_sensitivity.c
@@ -111,11 +111,16 @@ static int __init amd_freq_sensitivity_init(void)
 {
        u64 val;
        struct pci_dev *pcidev;
+       unsigned int pci_vendor;
 
-       if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
+       if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+               pci_vendor = PCI_VENDOR_ID_AMD;
+       else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
+               pci_vendor = PCI_VENDOR_ID_HYGON;
+       else
                return -ENODEV;
 
-       pcidev = pci_get_device(PCI_VENDOR_ID_AMD,
+       pcidev = pci_get_device(pci_vendor,
                        PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL);
 
        if (!pcidev) {