arm64: dts: imx93-var-som-symphony: enable UART7

Enable UART7 on the Symphony carrier board and add its pinctrl
configuration.

Signed-off-by: Stefano Radaelli <stefano.r@variscite.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts
index c736127c7115ec86d8bb5325d3f87b5501d92ae3..77377127c18c529c526114d12a7e50ad89a5c809 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts
@@ -35,6 +35,7 @@
                serial3 = &lpuart4;
                serial4 = &lpuart5;
                serial5 = &lpuart6;
+               serial6 = &lpuart7;
        };
 
 
@@ -305,6 +306,12 @@
        status = "okay";
 };
 
+&lpuart7 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart7>;
+       status = "okay";
+};
+
 &usbotg1 {
        dr_mode = "otg";
        hnp-disable;
@@ -441,6 +448,13 @@
                >;
        };
 
+       pinctrl_uart7: uart7grp {
+               fsl,pins = <
+                       MX93_PAD_GPIO_IO09__LPUART7_RX                  0x31e
+                       MX93_PAD_GPIO_IO08__LPUART7_TX                  0x31e
+               >;
+       };
+
        pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
                fsl,pins = <
                        MX93_PAD_GPIO_IO18__GPIO2_IO18          0x31e