#define AUTO_CAL_STATUS 0x880c
#define AUTO_CAL_STATUS_ACTIVE BIT(31)
-static void tegra_eqos_fix_speed(void *bsp_priv, int speed, unsigned int mode)
+static void tegra_eqos_fix_speed(void *bsp_priv, phy_interface_t interface,
+ int speed, unsigned int mode)
{
struct tegra_eqos *eqos = bsp_priv;
bool needs_calibration = false;
int (*fix_soc_reset)(struct stmmac_priv *priv);
int (*set_intf_mode)(struct imx_priv_data *dwmac, u8 phy_intf_sel);
- void (*fix_mac_speed)(void *priv, int speed, unsigned int mode);
+ void (*fix_mac_speed)(void *priv, phy_interface_t interface,
+ int speed, unsigned int mode);
};
struct imx_priv_data {
return stmmac_set_clk_tx_rate(bsp_priv, clk_tx_i, interface, speed);
}
-static void imx_dwmac_fix_speed(void *priv, int speed, unsigned int mode)
+static void imx_dwmac_fix_speed(void *priv, phy_interface_t interface,
+ int speed, unsigned int mode)
{
struct plat_stmmacenet_data *plat_dat;
struct imx_priv_data *dwmac = priv;
dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
}
-static void imx93_dwmac_fix_speed(void *priv, int speed, unsigned int mode)
+static void imx93_dwmac_fix_speed(void *priv, phy_interface_t interface,
+ int speed, unsigned int mode)
{
struct imx_priv_data *dwmac = priv;
unsigned int iface;
int ctrl, old_ctrl;
- imx_dwmac_fix_speed(priv, speed, mode);
+ imx_dwmac_fix_speed(priv, interface, speed, mode);
if (!dwmac || mode != MLO_AN_FIXED)
return;
.setup = loongson_gmac_data,
};
-static void loongson_gnet_fix_speed(void *priv, int speed, unsigned int mode)
+static void loongson_gnet_fix_speed(void *priv, phy_interface_t interface,
+ int speed, unsigned int mode)
{
struct loongson_data *ld = (struct loongson_data *)priv;
struct net_device *ndev = dev_get_drvdata(ld->dev);
return ethqos->configure_func(ethqos, speed);
}
-static void ethqos_fix_mac_speed(void *priv, int speed, unsigned int mode)
+static void ethqos_fix_mac_speed(void *priv, phy_interface_t interface,
+ int speed, unsigned int mode)
{
struct qcom_ethqos *ethqos = priv;
const struct socfpga_dwmac_ops *ops;
};
-static void socfpga_dwmac_fix_mac_speed(void *bsp_priv, int speed,
+static void socfpga_dwmac_fix_mac_speed(void *bsp_priv,
+ phy_interface_t interface, int speed,
unsigned int mode)
{
struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)bsp_priv;
struct regmap *regmap;
bool gmac_en;
int speed;
- void (*fix_retime_src)(void *priv, int speed, unsigned int mode);
+ void (*fix_retime_src)(void *priv, phy_interface_t interface,
+ int speed, unsigned int mode);
};
struct sti_dwmac_of_data {
- void (*fix_retime_src)(void *priv, int speed, unsigned int mode);
+ void (*fix_retime_src)(void *priv, phy_interface_t interface,
+ int speed, unsigned int mode);
};
enum {
| STIH4XX_ETH_SEL_INTERNAL_NOTEXT_PHYCLK,
};
-static void stih4xx_fix_retime_src(void *priv, int spd, unsigned int mode)
+static void stih4xx_fix_retime_src(void *priv, phy_interface_t interface,
+ int spd, unsigned int mode)
{
struct sti_dwmac *dwmac = priv;
u32 src = dwmac->tx_retime_src;
val = (dwmac->interface == PHY_INTERFACE_MODE_REVMII) ? 0 : ENMII;
regmap_update_bits(regmap, reg, ENMII_MASK, val);
- dwmac->fix_retime_src(dwmac, dwmac->speed, 0);
+ dwmac->fix_retime_src(dwmac, dwmac->interface, dwmac->speed, 0);
return 0;
}
}
if (priv->plat->fix_mac_speed)
- priv->plat->fix_mac_speed(priv->plat->bsp_priv, speed, mode);
+ priv->plat->fix_mac_speed(priv->plat->bsp_priv, interface,
+ speed, mode);
if (!duplex)
ctrl &= ~priv->hw->link.duplex;
int (*set_phy_intf_sel)(void *priv, u8 phy_intf_sel);
int (*set_clk_tx_rate)(void *priv, struct clk *clk_tx_i,
phy_interface_t interface, int speed);
- void (*fix_mac_speed)(void *priv, int speed, unsigned int mode);
+ void (*fix_mac_speed)(void *priv, phy_interface_t interface,
+ int speed, unsigned int mode);
int (*fix_soc_reset)(struct stmmac_priv *priv);
int (*serdes_powerup)(struct net_device *ndev, void *priv);
void (*serdes_powerdown)(struct net_device *ndev, void *priv);