cpu_map: Use compat partial check for all x86 CPU models

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>

diff --git a/src/cpu_map/x86_486.xml b/src/cpu_map/x86_486.xml
index d05b27739282fae4bba1933c1b953a7ccdef71ba..7aeac147aeaf6d67b3230e7029902529d0480fc6 100644 (file)
--- a/src/cpu_map/x86_486.xml
+++ b/src/cpu_map/x86_486.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='486'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <feature name='fpu'/>
     <feature name='pse'/>

diff --git a/src/cpu_map/x86_Broadwell-IBRS.xml b/src/cpu_map/x86_Broadwell-IBRS.xml
index 484593142054dcd0e989613c206d720d2935785a..a52db940236b36ffdb3ea5daa0124b15c884c69b 100644 (file)
--- a/src/cpu_map/x86_Broadwell-IBRS.xml
+++ b/src/cpu_map/x86_Broadwell-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Broadwell-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='61'/> <!-- 0306d0 -->
     <signature family='6' model='71'/> <!-- 040670 -->

diff --git a/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml b/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml
index b1e7aa5d5e2096d4d19b486dbcac090cad6fb883..2f4aaeb079812b9e6ea8540584328f6ce560a6d3 100644 (file)
--- a/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml
+++ b/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Broadwell-noTSX-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='61'/> <!-- 0306d0 -->
     <signature family='6' model='71'/> <!-- 040670 -->

diff --git a/src/cpu_map/x86_Broadwell-noTSX.xml b/src/cpu_map/x86_Broadwell-noTSX.xml
index 24aa6a37bd163341b1785255762bcfbc122aadb8..82f2d6d9cceb3dd19b67e96c6bd8bed9b044731d 100644 (file)
--- a/src/cpu_map/x86_Broadwell-noTSX.xml
+++ b/src/cpu_map/x86_Broadwell-noTSX.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Broadwell-noTSX'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='61'/> <!-- 0306d0 -->
     <signature family='6' model='71'/> <!-- 040670 -->

diff --git a/src/cpu_map/x86_Broadwell.xml b/src/cpu_map/x86_Broadwell.xml
index 1b27489db21ea04e733c12d27671ddeb9e4816d5..53e762f74eba2372631aca694cbaed1d46438091 100644 (file)
--- a/src/cpu_map/x86_Broadwell.xml
+++ b/src/cpu_map/x86_Broadwell.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Broadwell'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='61'/> <!-- 0306d0 -->
     <signature family='6' model='71'/> <!-- 040670 -->

diff --git a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml b/src/cpu_map/x86_Cascadelake-Server-noTSX.xml
index d1d49fdd583dd4b20e558b813da06268f9c8e467..3c2325562f4b0e2d13353cc0cbbd32cb306b6972 100644 (file)
--- a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml
+++ b/src/cpu_map/x86_Cascadelake-Server-noTSX.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Cascadelake-Server-noTSX'>
+    <check partial='compat'/>
     <decode host='on' guest='off'/>
     <signature family='6' model='85' stepping='5-7'/> <!-- 050654 -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Cascadelake-Server.xml b/src/cpu_map/x86_Cascadelake-Server.xml
index 09840ce52fe6f0f04a0be1cf481376fe1e90cdfc..1463982addcdf74df5efe8ed9c2580628c79f579 100644 (file)
--- a/src/cpu_map/x86_Cascadelake-Server.xml
+++ b/src/cpu_map/x86_Cascadelake-Server.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Cascadelake-Server'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='85' stepping='5-7'/> <!-- 050654 -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Conroe.xml b/src/cpu_map/x86_Conroe.xml
index 955297ffc3012d4491f677a8fe2cabec50bb74d8..b187dd503430c8f94d66d3bd5b216d3617f64b29 100644 (file)
--- a/src/cpu_map/x86_Conroe.xml
+++ b/src/cpu_map/x86_Conroe.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Conroe'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='15'/> <!-- 0006f0 -->
     <signature family='6' model='22'/> <!-- 010660 -->

diff --git a/src/cpu_map/x86_Cooperlake.xml b/src/cpu_map/x86_Cooperlake.xml
index 8f37df60de798f505a3359e5a78351ca15382e68..acb46eaf8a4c4228af2ca71d3a857ab7f6ef4271 100644 (file)
--- a/src/cpu_map/x86_Cooperlake.xml
+++ b/src/cpu_map/x86_Cooperlake.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Cooperlake'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='85' stepping='10-11'/> <!-- 05065b -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Dhyana.xml b/src/cpu_map/x86_Dhyana.xml
index cfde07f99fa4f5c4c579e79481246c1acc3c2f8c..4ee32877f7d876fc381f80ca96609dfc846fbe1d 100644 (file)
--- a/src/cpu_map/x86_Dhyana.xml
+++ b/src/cpu_map/x86_Dhyana.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Dhyana'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='24' model='0'/> <!-- 900f00 -->
     <vendor name='Hygon'/>

diff --git a/src/cpu_map/x86_EPYC-Genoa.xml b/src/cpu_map/x86_EPYC-Genoa.xml
index 3e765b89b1690bbba7504ea63f462dd8b1566753..d87a01fd16b1284a38f0c7b99f26b873eac9520b 100644 (file)
--- a/src/cpu_map/x86_EPYC-Genoa.xml
+++ b/src/cpu_map/x86_EPYC-Genoa.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='EPYC-Genoa'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='25' model='17'/>
     <vendor name='AMD'/>

diff --git a/src/cpu_map/x86_EPYC-IBPB.xml b/src/cpu_map/x86_EPYC-IBPB.xml
index fc5aadf52e2cb9bf44fe296e84a55cfac16017c5..bb1eedf567dfd8735c058aaa8a11122d4369b78f 100644 (file)
--- a/src/cpu_map/x86_EPYC-IBPB.xml
+++ b/src/cpu_map/x86_EPYC-IBPB.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='EPYC-IBPB'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='23' model='1'/> <!-- 800f10 -->
     <vendor name='AMD'/>

diff --git a/src/cpu_map/x86_EPYC-Milan.xml b/src/cpu_map/x86_EPYC-Milan.xml
index 3055e175fa5b32e0c9451013600165b3b4e7a7e0..6849ded9aafe622e74f42daf66fc1bee8a87528c 100644 (file)
--- a/src/cpu_map/x86_EPYC-Milan.xml
+++ b/src/cpu_map/x86_EPYC-Milan.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='EPYC-Milan'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='25' model='1'/>
     <vendor name='AMD'/>

diff --git a/src/cpu_map/x86_EPYC-Rome.xml b/src/cpu_map/x86_EPYC-Rome.xml
index e54d0a48d835e1edaaace5aec6da79d3074c1dc1..355f8368cef4ae23c9a392d81d6f5d2201dae91f 100644 (file)
--- a/src/cpu_map/x86_EPYC-Rome.xml
+++ b/src/cpu_map/x86_EPYC-Rome.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='EPYC-Rome'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='23' model='49'/>
     <vendor name='AMD'/>

diff --git a/src/cpu_map/x86_EPYC.xml b/src/cpu_map/x86_EPYC.xml
index 3b406de37acb5391defe7caeb834c7b6c01cb092..9b47fbba5b54208d9e43092849c3bd47f81b7f04 100644 (file)
--- a/src/cpu_map/x86_EPYC.xml
+++ b/src/cpu_map/x86_EPYC.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='EPYC'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='23' model='1'/> <!-- 800f10 -->
     <vendor name='AMD'/>

diff --git a/src/cpu_map/x86_GraniteRapids.xml b/src/cpu_map/x86_GraniteRapids.xml
index 9a94476459a765f58878a75ef3c5b3b65132831c..68491a7bc103106851c153f500833455c09e3bf1 100644 (file)
--- a/src/cpu_map/x86_GraniteRapids.xml
+++ b/src/cpu_map/x86_GraniteRapids.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='GraniteRapids'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='173'/>
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Haswell-IBRS.xml b/src/cpu_map/x86_Haswell-IBRS.xml
index 0fed6fbb78d48796164916055e1566a0d0d56918..e5b88758add656ff7bf0b0ce98fd7c90860ef06c 100644 (file)
--- a/src/cpu_map/x86_Haswell-IBRS.xml
+++ b/src/cpu_map/x86_Haswell-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Haswell-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='60'/> <!-- 0306c0 -->
     <signature family='6' model='63'/> <!-- 0306f0 -->

diff --git a/src/cpu_map/x86_Haswell-noTSX-IBRS.xml b/src/cpu_map/x86_Haswell-noTSX-IBRS.xml
index f7bc81ba4d1711996d2f24a0a96e660f18be72ae..0a2e7dc17c8e7cebcf3e5f6df0a0a41e00c9675c 100644 (file)
--- a/src/cpu_map/x86_Haswell-noTSX-IBRS.xml
+++ b/src/cpu_map/x86_Haswell-noTSX-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Haswell-noTSX-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='60'/> <!-- 0306c0 -->
     <signature family='6' model='63'/> <!-- 0306f0 -->

diff --git a/src/cpu_map/x86_Haswell-noTSX.xml b/src/cpu_map/x86_Haswell-noTSX.xml
index 7d1791191717b71124a435339516cb457b3a9895..9e16212c046ed043f5e68ebf2c52149d3ed62f32 100644 (file)
--- a/src/cpu_map/x86_Haswell-noTSX.xml
+++ b/src/cpu_map/x86_Haswell-noTSX.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Haswell-noTSX'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='60'/> <!-- 0306c0 -->
     <signature family='6' model='63'/> <!-- 0306f0 -->

diff --git a/src/cpu_map/x86_Haswell.xml b/src/cpu_map/x86_Haswell.xml
index b121e15d4d853a891a70f732ac7c804cef153dc6..3e529762407084146d165d33eba2fb88ee83f8e8 100644 (file)
--- a/src/cpu_map/x86_Haswell.xml
+++ b/src/cpu_map/x86_Haswell.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Haswell'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='60'/> <!-- 0306c0 -->
     <signature family='6' model='63'/> <!-- 0306f0 -->

diff --git a/src/cpu_map/x86_Icelake-Client-noTSX.xml b/src/cpu_map/x86_Icelake-Client-noTSX.xml
index 217adba4f27a8594ecd05150b5ac8a3466663f2e..3c61372ca39f262cc25e792ebd16d7bcbc088252 100644 (file)
--- a/src/cpu_map/x86_Icelake-Client-noTSX.xml
+++ b/src/cpu_map/x86_Icelake-Client-noTSX.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Icelake-Client-noTSX'>
+    <check partial='compat'/>
     <decode host='on' guest='off'/>
     <signature family='6' model='126'/> <!-- 0706e0 -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Icelake-Client.xml b/src/cpu_map/x86_Icelake-Client.xml
index b725227f464ecec2218fe1eb71647b5dcefe60a8..dd777f36b7ca6d04b4fc5c85935f787a3fe64da9 100644 (file)
--- a/src/cpu_map/x86_Icelake-Client.xml
+++ b/src/cpu_map/x86_Icelake-Client.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Icelake-Client'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='126'/> <!-- 0706e0 -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Icelake-Server-noTSX.xml b/src/cpu_map/x86_Icelake-Server-noTSX.xml
index 36596433cbb75ce8e78d315579bff6cf6b1eb404..d8dd8f4933c471e17c4ebd7a342f0589a99abc54 100644 (file)
--- a/src/cpu_map/x86_Icelake-Server-noTSX.xml
+++ b/src/cpu_map/x86_Icelake-Server-noTSX.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Icelake-Server-noTSX'>
+    <check partial='compat'/>
     <decode host='on' guest='off'/>
     <signature family='6' model='106'/> <!-- 0606A5 -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Icelake-Server.xml b/src/cpu_map/x86_Icelake-Server.xml
index 1e7ff355d5aa6ee9937752a71a7d646030c9a803..69dd32fb2d45bd069e5d07054160286b4a081e0a 100644 (file)
--- a/src/cpu_map/x86_Icelake-Server.xml
+++ b/src/cpu_map/x86_Icelake-Server.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Icelake-Server'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='106'/> <!-- 0606A5 -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_IvyBridge-IBRS.xml b/src/cpu_map/x86_IvyBridge-IBRS.xml
index 324152f85653ff90dda1aed467845799d1df1321..e2e01694cd2c40818180e52952b0e52924ed7456 100644 (file)
--- a/src/cpu_map/x86_IvyBridge-IBRS.xml
+++ b/src/cpu_map/x86_IvyBridge-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='IvyBridge-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='58'/> <!-- 0306a0 -->
     <signature family='6' model='62'/> <!-- 0306e0 -->

diff --git a/src/cpu_map/x86_IvyBridge.xml b/src/cpu_map/x86_IvyBridge.xml
index 49d587afab5006633a9a0194364f1e6aae9e4eba..546c2eedb89a4ad448285135a7c0483426f4e498 100644 (file)
--- a/src/cpu_map/x86_IvyBridge.xml
+++ b/src/cpu_map/x86_IvyBridge.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='IvyBridge'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='58'/> <!-- 0306a0 -->
     <signature family='6' model='62'/> <!-- 0306e0 -->

diff --git a/src/cpu_map/x86_Nehalem-IBRS.xml b/src/cpu_map/x86_Nehalem-IBRS.xml
index ac05a349db1c04966152157ebeccb1e55edff0d1..22c2e0f59e9d5a63c28588d4af159e4a3f72045c 100644 (file)
--- a/src/cpu_map/x86_Nehalem-IBRS.xml
+++ b/src/cpu_map/x86_Nehalem-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Nehalem-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='26'/> <!-- 0106a0 -->
     <signature family='6' model='30'/> <!-- 0106e0 -->

diff --git a/src/cpu_map/x86_Nehalem.xml b/src/cpu_map/x86_Nehalem.xml
index 74b85701e88d026953b0f95d5124a553b8a442ea..40903a92b3085a11ff5d250e0ee08180c8e3a084 100644 (file)
--- a/src/cpu_map/x86_Nehalem.xml
+++ b/src/cpu_map/x86_Nehalem.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Nehalem'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='26'/> <!-- 0106a0 -->
     <signature family='6' model='30'/> <!-- 0106e0 -->

diff --git a/src/cpu_map/x86_Opteron_G1.xml b/src/cpu_map/x86_Opteron_G1.xml
index 57648ca93f21aaba40d8ade7526ef90c6af90539..32c7fc9ca2feebd3302c2f0ecb479ac9050970f9 100644 (file)
--- a/src/cpu_map/x86_Opteron_G1.xml
+++ b/src/cpu_map/x86_Opteron_G1.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Opteron_G1'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='15' model='6'/> <!-- 100e60 -->
     <vendor name='AMD'/>

diff --git a/src/cpu_map/x86_Opteron_G2.xml b/src/cpu_map/x86_Opteron_G2.xml
index db961b006790033e5b00df1c6726a54a9b32d33e..01a4d69613b656aac25b129b0f784b2c3ae172d0 100644 (file)
--- a/src/cpu_map/x86_Opteron_G2.xml
+++ b/src/cpu_map/x86_Opteron_G2.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Opteron_G2'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='15' model='6'/> <!-- 100e60 -->
     <vendor name='AMD'/>

diff --git a/src/cpu_map/x86_Opteron_G3.xml b/src/cpu_map/x86_Opteron_G3.xml
index cf00af8698c4e3d9cfa5ea00f59c3e74fa71598a..d2871b4b56887e304af1ac440ef7781963db5881 100644 (file)
--- a/src/cpu_map/x86_Opteron_G3.xml
+++ b/src/cpu_map/x86_Opteron_G3.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Opteron_G3'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='15' model='6'/> <!-- 100e60 -->
     <vendor name='AMD'/>

diff --git a/src/cpu_map/x86_Opteron_G4.xml b/src/cpu_map/x86_Opteron_G4.xml
index a7fc8d5828efd1f0229b2af8bbf7c5b615c33e0c..527124a3725d71ec75c6e8a05208240995e10588 100644 (file)
--- a/src/cpu_map/x86_Opteron_G4.xml
+++ b/src/cpu_map/x86_Opteron_G4.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Opteron_G4'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='21' model='1'/> <!-- 600f10 -->
     <vendor name='AMD'/>

diff --git a/src/cpu_map/x86_Opteron_G5.xml b/src/cpu_map/x86_Opteron_G5.xml
index ff775bdcefadaf3d1389d6625fae116efa2c8b69..8f51c713aa02b89e6a30f1901ea49849b0df3a90 100644 (file)
--- a/src/cpu_map/x86_Opteron_G5.xml
+++ b/src/cpu_map/x86_Opteron_G5.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Opteron_G5'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='21' model='2'/> <!-- 600f20 -->
     <vendor name='AMD'/>

diff --git a/src/cpu_map/x86_Penryn.xml b/src/cpu_map/x86_Penryn.xml
index b31f96fa43194c1e3dd905905cfaa928107a6e96..0c6adb9037656352a51dfa34be39c74cce121e33 100644 (file)
--- a/src/cpu_map/x86_Penryn.xml
+++ b/src/cpu_map/x86_Penryn.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Penryn'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='23'/> <!-- 010670 -->
     <signature family='6' model='29'/> <!-- 0106d0 -->

diff --git a/src/cpu_map/x86_SandyBridge-IBRS.xml b/src/cpu_map/x86_SandyBridge-IBRS.xml
index d2071f3367699a381ea4931addc96c7aca02c661..160176358463d7d087aaa186d2bafc4cc054f796 100644 (file)
--- a/src/cpu_map/x86_SandyBridge-IBRS.xml
+++ b/src/cpu_map/x86_SandyBridge-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='SandyBridge-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='42'/> <!-- 0206a0 -->
     <signature family='6' model='45'/> <!-- 0206d0 -->

diff --git a/src/cpu_map/x86_SandyBridge.xml b/src/cpu_map/x86_SandyBridge.xml
index c5d342e0d09026b8c915af809a61d03a5bfbcfc3..7ae867180e965b72b8a3fa09d41a74fa821911b2 100644 (file)
--- a/src/cpu_map/x86_SandyBridge.xml
+++ b/src/cpu_map/x86_SandyBridge.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='SandyBridge'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='42'/> <!-- 0206a0 -->
     <signature family='6' model='45'/> <!-- 0206d0 -->

diff --git a/src/cpu_map/x86_SapphireRapids.xml b/src/cpu_map/x86_SapphireRapids.xml
index 1e53b30dd376526e6367fafb072116fa61cf4a77..6377175fe0c08f18f5d595df3a98324540487006 100644 (file)
--- a/src/cpu_map/x86_SapphireRapids.xml
+++ b/src/cpu_map/x86_SapphireRapids.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='SapphireRapids'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='143'/>
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_SierraForest.xml b/src/cpu_map/x86_SierraForest.xml
index caa6956e94d603e6badbd955ee510b2af8873798..ea4989f32946e974fd78f6495ab8231e43563db7 100644 (file)
--- a/src/cpu_map/x86_SierraForest.xml
+++ b/src/cpu_map/x86_SierraForest.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='SierraForest'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='175'/>
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Skylake-Client-IBRS.xml b/src/cpu_map/x86_Skylake-Client-IBRS.xml
index 892aef2031eeb120df64b52ae863bc9dc9c2da88..0b1df8fc5a4dd33ba154be8436c87cc3f89d75ee 100644 (file)
--- a/src/cpu_map/x86_Skylake-Client-IBRS.xml
+++ b/src/cpu_map/x86_Skylake-Client-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Skylake-Client-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='94'/> <!-- 0506e0 -->
     <signature family='6' model='78'/> <!-- 0406e0 -->

diff --git a/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml b/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml
index 63e5a0229643d4d1296f0bb1cc4262af606925cd..8884bb4bae1e04fa76d46c1c581a0a8d0cd121d8 100644 (file)
--- a/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml
+++ b/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Skylake-Client-noTSX-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='off'/>
     <signature family='6' model='94'/> <!-- 0506e0 -->
     <signature family='6' model='78'/> <!-- 0406e0 -->

diff --git a/src/cpu_map/x86_Skylake-Client.xml b/src/cpu_map/x86_Skylake-Client.xml
index 83cc6780c797fd9a72b4bb7f466ccf5c4e233f5b..8d8ab41ddd6afe259df1c57ee752997abbb22230 100644 (file)
--- a/src/cpu_map/x86_Skylake-Client.xml
+++ b/src/cpu_map/x86_Skylake-Client.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Skylake-Client'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='94'/> <!-- 0506e0 -->
     <signature family='6' model='78'/> <!-- 0406e0 -->

diff --git a/src/cpu_map/x86_Skylake-Server-IBRS.xml b/src/cpu_map/x86_Skylake-Server-IBRS.xml
index 84f67c62780bfec625aa0a3b1b91f0aa9925409f..8a4552f60bbbc2faec5ba462b713616ccb43b395 100644 (file)
--- a/src/cpu_map/x86_Skylake-Server-IBRS.xml
+++ b/src/cpu_map/x86_Skylake-Server-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Skylake-Server-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='85' stepping='0-4'/> <!-- 050654 -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml b/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml
index 081e30f5ad200016f6d803adc133fdda75264ca7..e469da286e10362e49c941a6ff301d14c2e02600 100644 (file)
--- a/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml
+++ b/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Skylake-Server-noTSX-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='off'/>
     <signature family='6' model='85' stepping='0-4'/> <!-- 050654 -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Skylake-Server.xml b/src/cpu_map/x86_Skylake-Server.xml
index e814b8dcf3f1d0a1b460f0fc1badb63de74d5a6e..e7ad70e8124b5fc4b1ee7069fa3dc1c4cd33fcb2 100644 (file)
--- a/src/cpu_map/x86_Skylake-Server.xml
+++ b/src/cpu_map/x86_Skylake-Server.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Skylake-Server'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='85' stepping='0-4'/> <!-- 050654 -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Snowridge.xml b/src/cpu_map/x86_Snowridge.xml
index b254c7d71e2935632685caf1dd6e5d5a0550c0d3..8b3690adb3a49704ded06de9373e06749f82b6a2 100644 (file)
--- a/src/cpu_map/x86_Snowridge.xml
+++ b/src/cpu_map/x86_Snowridge.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Snowridge'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='134'/> <!-- 080665 -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Westmere-IBRS.xml b/src/cpu_map/x86_Westmere-IBRS.xml
index 5d2fd81b8d9f7408c10816d8440486c80856868d..2130bec8ce69d3804dbd80d12225abc03225762a 100644 (file)
--- a/src/cpu_map/x86_Westmere-IBRS.xml
+++ b/src/cpu_map/x86_Westmere-IBRS.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Westmere-IBRS'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='44'/> <!-- 0206c0 -->
     <vendor name='Intel'/>

diff --git a/src/cpu_map/x86_Westmere.xml b/src/cpu_map/x86_Westmere.xml
index abbfb186b4e2f15caebef64e93ab1fb90d89d9b6..102af0b46bae32b60d15f088d5f806b2a79dedb5 100644 (file)
--- a/src/cpu_map/x86_Westmere.xml
+++ b/src/cpu_map/x86_Westmere.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='Westmere'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <signature family='6' model='44'/> <!-- 0206c0 -->
     <signature family='6' model='47'/> <!-- 0206f0 -->

diff --git a/src/cpu_map/x86_athlon.xml b/src/cpu_map/x86_athlon.xml
index 81c43c81e8ba94c64cce70b8988c52005177e3f0..38259e0c46cb6fd0240f3003ec9ebe76afb94706 100644 (file)
--- a/src/cpu_map/x86_athlon.xml
+++ b/src/cpu_map/x86_athlon.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='athlon'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <vendor name='AMD'/>
     <feature name='3dnow'/>

diff --git a/src/cpu_map/x86_core2duo.xml b/src/cpu_map/x86_core2duo.xml
index ea23a6c6629dfd8b358d9c199c399915378abc79..623ad40559a803a1167901ecd86c900497f56245 100644 (file)
--- a/src/cpu_map/x86_core2duo.xml
+++ b/src/cpu_map/x86_core2duo.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='core2duo'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <vendor name='Intel'/>
     <feature name='apic'/>

diff --git a/src/cpu_map/x86_coreduo.xml b/src/cpu_map/x86_coreduo.xml
index 24900e637fac532379279ed4b7fa9add8c9457bf..e934213705ebe989dfc75647eb3a60c9e5d0da8f 100644 (file)
--- a/src/cpu_map/x86_coreduo.xml
+++ b/src/cpu_map/x86_coreduo.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='coreduo'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <vendor name='Intel'/>
     <feature name='apic'/>

diff --git a/src/cpu_map/x86_cpu64-rhel5.xml b/src/cpu_map/x86_cpu64-rhel5.xml
index 7402b7603c7030e3f0b498ac93994fc6cd9f6593..f3310474749791fdfee4eecd3ae1fb27d05b9bb6 100644 (file)
--- a/src/cpu_map/x86_cpu64-rhel5.xml
+++ b/src/cpu_map/x86_cpu64-rhel5.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='cpu64-rhel5'>
+    <check partial='compat'/>
     <decode host='off' guest='off'/>
     <feature name='apic'/>
     <feature name='clflush'/>

diff --git a/src/cpu_map/x86_cpu64-rhel6.xml b/src/cpu_map/x86_cpu64-rhel6.xml
index 061939c733657f75e02f4ba045a714e394abae64..b05620563ec51ffdbc03270f1d52ea5286c9dbf3 100644 (file)
--- a/src/cpu_map/x86_cpu64-rhel6.xml
+++ b/src/cpu_map/x86_cpu64-rhel6.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='cpu64-rhel6'>
+    <check partial='compat'/>
     <decode host='off' guest='off'/>
     <feature name='apic'/>
     <feature name='clflush'/>

diff --git a/src/cpu_map/x86_kvm32.xml b/src/cpu_map/x86_kvm32.xml
index ac28c53bd0b92a0410306b81435d19cbda09e7fe..1f2de9d477fd6d17988a7cf57b6cf11fa06572cd 100644 (file)
--- a/src/cpu_map/x86_kvm32.xml
+++ b/src/cpu_map/x86_kvm32.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='kvm32'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <feature name='apic'/>
     <feature name='clflush'/>

diff --git a/src/cpu_map/x86_kvm64.xml b/src/cpu_map/x86_kvm64.xml
index 970a8e73d50fafe687a6d572c893c0e810b9da56..f6fcf1f94cd73bd6e86e207b29e8216044d737d8 100644 (file)
--- a/src/cpu_map/x86_kvm64.xml
+++ b/src/cpu_map/x86_kvm64.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='kvm64'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <feature name='apic'/>
     <feature name='clflush'/>

diff --git a/src/cpu_map/x86_n270.xml b/src/cpu_map/x86_n270.xml
index 5507d2ea3b88d3983ab72f5ae3d6d96d7ccd90bc..fd088902fb395eb32fb8b25a02508a1f1aa0cd55 100644 (file)
--- a/src/cpu_map/x86_n270.xml
+++ b/src/cpu_map/x86_n270.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='n270'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <vendor name='Intel'/>
     <feature name='apic'/>

diff --git a/src/cpu_map/x86_pentium.xml b/src/cpu_map/x86_pentium.xml
index f0a8982115bae1be8509276a117f9823d2e49da8..a3d1063510f9c8d0dc598e48d3285bf4f874f208 100644 (file)
--- a/src/cpu_map/x86_pentium.xml
+++ b/src/cpu_map/x86_pentium.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='pentium'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <feature name='cx8'/>
     <feature name='de'/>

diff --git a/src/cpu_map/x86_pentium2.xml b/src/cpu_map/x86_pentium2.xml
index aeba08229770e0a085ea3399aec296a88d4b158d..0d0cc97e1a85e4d7a833b86d3fd78c47acab343b 100644 (file)
--- a/src/cpu_map/x86_pentium2.xml
+++ b/src/cpu_map/x86_pentium2.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='pentium2'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <feature name='cmov'/>
     <feature name='cx8'/>

diff --git a/src/cpu_map/x86_pentium3.xml b/src/cpu_map/x86_pentium3.xml
index ab85d2967f91c2dd481b98c1493f769dee8083a1..fd249e29f9df6560ef0a99f38aad22a08692e5ee 100644 (file)
--- a/src/cpu_map/x86_pentium3.xml
+++ b/src/cpu_map/x86_pentium3.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='pentium3'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <feature name='cmov'/>
     <feature name='cx8'/>

diff --git a/src/cpu_map/x86_pentiumpro.xml b/src/cpu_map/x86_pentiumpro.xml
index b6e061187ca768cde394da455d0edf9e974f9152..f3d18db0336d70e59c25f42dec4d79a3b882ee44 100644 (file)
--- a/src/cpu_map/x86_pentiumpro.xml
+++ b/src/cpu_map/x86_pentiumpro.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='pentiumpro'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <feature name='apic'/>
     <feature name='cmov'/>

diff --git a/src/cpu_map/x86_phenom.xml b/src/cpu_map/x86_phenom.xml
index f0f8ece57a9a85d3bec68769d1067fda0c7c1e69..81412362334449c16000cd1ebad7c2c6b551f21a 100644 (file)
--- a/src/cpu_map/x86_phenom.xml
+++ b/src/cpu_map/x86_phenom.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='phenom'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <vendor name='AMD'/>
     <feature name='3dnow'/>

diff --git a/src/cpu_map/x86_qemu32.xml b/src/cpu_map/x86_qemu32.xml
index f3fb1959bec697aa4a64c752b9b3e61fb402d0b4..adb51a04d617f5c5d87d5e88aea456f09fd5bf98 100644 (file)
--- a/src/cpu_map/x86_qemu32.xml
+++ b/src/cpu_map/x86_qemu32.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='qemu32'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <feature name='apic'/>
     <feature name='cmov'/>

diff --git a/src/cpu_map/x86_qemu64.xml b/src/cpu_map/x86_qemu64.xml
index 0fe207a2b48a7cb3c43638ec9ce394f027cfda96..cbb78211a6386ed2e778da3a031efbbee5a1b030 100644 (file)
--- a/src/cpu_map/x86_qemu64.xml
+++ b/src/cpu_map/x86_qemu64.xml
@@ -1,5 +1,6 @@
 <cpus>
   <model name='qemu64'>
+    <check partial='compat'/>
     <decode host='on' guest='on'/>
     <!-- These are supported only by TCG.  KVM supports them only if the
          host does.  So we leave them out: