The RK3036 HDMI DDC bus requires it's PHY's reference clock to be
enabled first before normal DDC communication can be carried out.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de> #rk3036-kylin
Link: https://lore.kernel.org/r/20250422070455.432666-6-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
compatible = "rockchip,rk3036-inno-hdmi";
reg = <0x20034000 0x4000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_HDMI>;
- clock-names = "pclk";
+ clocks = <&cru PCLK_HDMI>, <&cru SCLK_LCDC>;
+ clock-names = "pclk", "ref";
pinctrl-names = "default";
pinctrl-0 = <&hdmi_ctl>;
#sound-dai-cells = <0>;