arm64: dts: qcom: qcs6490-rb3gen2: Enable uPD720201 and GL3590

The QCS6490 Rb3Gen2 has a Renesas μPD720201 XHCI controller hanging off
the TC9563 PCIe switch, on this a Genesys Logic GL3590 USB hub provides
two USB Type-A ports and an ASIX AX88179 USB 3.0 Gigabit Ethernet
interface.

The Renesas chip is powered by two regulators controlled through PM7250B
GPIOs 1 and 4, and the power/reset pin is pulled down by PM8350C GPIO 4.
The Genesys chip power is always-on, but the reset pin is controlled
through TLMM GPIO 162.

Describe the Renesas chip on the PCIe bus, with supplies and reset, to
allow it to be brought out of reset and discovered. Then describe the
two peers of the USB hub, with its reset GPIO, to allow this to be
brought out of reset.

The USB Type-A connectors are not described, as they are in no regard
controlled by the operating system.

Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260323-rb3gen2-upd-gl3590-v2-1-073514bf9ed5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index cd54525e45e0f58c7c4d21b010422b55e5fbbb77..e393ccf1884afde7816739053d41ca789acfca91 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -262,6 +262,28 @@
                };
        };
 
+       vreg_pcie0_1p05: regulator-pcie0-1p05v {
+               compatible = "regulator-fixed";
+               regulator-name = "PCIE0_1.05V";
+               gpio = <&pm7250b_gpios 4 GPIO_ACTIVE_HIGH>;
+               regulator-min-microvolt = <1050000>;
+               regulator-max-microvolt = <1050000>;
+               enable-active-high;
+               pinctrl-0 = <&upd_pwr_en2_state>;
+               pinctrl-names = "default";
+       };
+
+       vreg_pcie0_3p3: regulator-pcie0-3p3v-dual {
+               compatible = "regulator-fixed";
+               regulator-name = "PCIE0_3.3V_Dual";
+               gpio = <&pm7250b_gpios 1 GPIO_ACTIVE_HIGH>;
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               enable-active-high;
+               pinctrl-0 = <&upd_pwr_en1_state>;
+               pinctrl-names = "default";
+       };
+
        vdd_ntn_0p9: regulator-vdd-ntn-0p9 {
                compatible = "regulator-fixed";
                regulator-name = "VDD_NTN_0P9";
@@ -870,6 +892,41 @@
                        device_type = "pci";
                        ranges;
                        bus-range = <0x4 0xff>;
+
+                       /* Renesas μPD720201 PCIe USB3.0 Host Controller */
+                       usb-controller@0,0 {
+                               compatible = "pci1912,0014";
+                               reg = <0x40000 0x0 0x0 0x0 0x0>;
+
+                               avdd33-supply = <&vreg_pcie0_3p3>;
+                               vdd10-supply = <&vreg_pcie0_1p05>;
+                               vdd33-supply = <&vreg_pcie0_3p3>;
+
+                               pinctrl-0 = <&upd_hub_rst_state>;
+                               pinctrl-names = "default";
+
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               /* Genesys Logic GL3590 USB Hub Controller */
+                               gl3590_2_0: hub@1 {
+                                       compatible = "usb5e3,610";
+                                       reg = <1>;
+                                       reset-gpios = <&tlmm 162 GPIO_ACTIVE_HIGH>;
+
+                                       pinctrl-0 = <&usb_hub_reset_state>;
+                                       pinctrl-names = "default";
+
+                                       peer-hub = <&gl3590_3_0>;
+                               };
+
+                               gl3590_3_0: hub@2 {
+                                       compatible = "usb5e3,625";
+                                       reg = <2>;
+
+                                       peer-hub = <&gl3590_2_0>;
+                               };
+                       };
                };
 
                pcie@3,0 {
@@ -1198,6 +1255,17 @@
                power-source = <0>;
        };
 
+       upd_hub_rst_state: upd-hub-rst-state {
+               pins = "gpio4";
+               function = "normal";
+
+               bias-disable;
+               input-disable;
+               output-enable;
+               output-high;
+               power-source = <0>;
+       };
+
        tc9563_resx_n: tc9563-resx-state {
                pins = "gpio1";
                function = "normal";
@@ -1378,6 +1446,15 @@
 };
 
 &pm7250b_gpios {
+       upd_pwr_en1_state: upd-pwr-en1-state {
+               pins = "gpio1";
+               function = "normal";
+
+               output-enable;
+               input-disable;
+               power-source = <0>;
+       };
+
        lt9611_rst_pin: lt9611-rst-state {
                pins = "gpio2";
                function = "normal";
@@ -1386,6 +1463,15 @@
                input-disable;
                power-source = <0>;
        };
+
+       upd_pwr_en2_state: upd-pwr-en2-state {
+               pins = "gpio4";
+               function = "normal";
+
+               output-enable;
+               input-disable;
+               power-source = <0>;
+       };
 };
 
 &sdc2_clk {
@@ -1431,6 +1517,13 @@
                function = "gpio";
                bias-pull-up;
        };
+
+       usb_hub_reset_state: usb-hub-reset-state {
+               pins = "gpio162";
+               function = "gpio";
+               drive-strength = <2>;
+               bias-disable;
+       };
 };
 
 &lpass_audiocc {