More use of LibVEX_GUEST_STATE_ALIGN.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14931

diff --git a/coregrind/m_scheduler/scheduler.c b/coregrind/m_scheduler/scheduler.c
index 33642d728f24b66c5948b0bd6c4bfeb687c8cba3..3ec0c8d875d51740c4c83d035b7c80529a3b02d5 100644 (file)
--- a/coregrind/m_scheduler/scheduler.c
+++ b/coregrind/m_scheduler/scheduler.c
@@ -691,8 +691,8 @@ void VG_(scheduler_init_phase2) ( ThreadId tid_main,
    layout requirements.  See libvex.h for details, but in short the
    requirements are: There must be no holes in between the primary
    guest state, its two copies, and the spill area.  In short, all 4
-   areas must have a 16-aligned size and be 16-aligned, and placed
-   back-to-back. */
+   areas must be aligned on the LibVEX_GUEST_STATE_ALIGN boundary and 
+   be placed back-to-back without holes in between. */
 static void do_pre_run_checks ( volatile ThreadState* tst )
 {
    Addr a_vex     = (Addr) & tst->arch.vex;
@@ -712,15 +712,15 @@ static void do_pre_run_checks ( volatile ThreadState* tst )
                (void*)a_vexsh2, sz_vexsh2,
                (void*)a_spill, sz_spill );
 
-   vg_assert(VG_IS_16_ALIGNED(sz_vex));
-   vg_assert(VG_IS_16_ALIGNED(sz_vexsh1));
-   vg_assert(VG_IS_16_ALIGNED(sz_vexsh2));
-   vg_assert(VG_IS_16_ALIGNED(sz_spill));
+   vg_assert(sz_vex    % LibVEX_GUEST_STATE_ALIGN == 0);
+   vg_assert(sz_vexsh1 % LibVEX_GUEST_STATE_ALIGN == 0);
+   vg_assert(sz_vexsh2 % LibVEX_GUEST_STATE_ALIGN == 0);
+   vg_assert(sz_spill  % LibVEX_GUEST_STATE_ALIGN == 0);
 
-   vg_assert(VG_IS_16_ALIGNED(a_vex));
-   vg_assert(VG_IS_16_ALIGNED(a_vexsh1));
-   vg_assert(VG_IS_16_ALIGNED(a_vexsh2));
-   vg_assert(VG_IS_16_ALIGNED(a_spill));
+   vg_assert(a_vex    % LibVEX_GUEST_STATE_ALIGN == 0);
+   vg_assert(a_vexsh1 % LibVEX_GUEST_STATE_ALIGN == 0);
+   vg_assert(a_vexsh2 % LibVEX_GUEST_STATE_ALIGN == 0);
+   vg_assert(a_spill  % LibVEX_GUEST_STATE_ALIGN == 0);
 
    /* Check that the guest state and its two shadows have the same
       size, and that there are no holes in between.  The latter is

diff --git a/coregrind/pub_core_threadstate.h b/coregrind/pub_core_threadstate.h
index 58d42f78a104bb4d4176de51d73ca691b99a06b0..fafcce936d745c92a708691ccb53bd99a232900b 100644 (file)
--- a/coregrind/pub_core_threadstate.h
+++ b/coregrind/pub_core_threadstate.h
@@ -92,9 +92,9 @@ typedef
 
       /* Note that for code generation reasons, we require that the
          guest state area, its two shadows, and the spill area, are
-         16-aligned and have 16-aligned sizes, and there are no holes
-         in between.  This is checked by do_pre_run_checks() in
-         scheduler.c. */
+         aligned on LibVEX_GUEST_STATE_ALIGN and have sizes, such that
+         there are no holes in between. This is checked by do_pre_run_checks()
+         in scheduler.c. */
 
       /* Saved machine context. */
       VexGuestArchState vex __attribute__((aligned(LibVEX_GUEST_STATE_ALIGN)));