if (HAS_LT_PHY(display)) {
encoder->enable_clock = intel_mtl_pll_enable_clock;
- encoder->disable_clock = intel_xe3plpd_pll_disable;
+ encoder->disable_clock = intel_mtl_pll_disable_clock;
encoder->port_pll_type = intel_mtl_port_pll_type;
encoder->get_config = xe3plpd_ddi_get_config;
} else if (DISPLAY_VER(display) >= 14) {
intel_xe3plpd_pll_enable(encoder, pll, dpll_hw_state);
}
+static void xe3plpd_pll_disable(struct intel_display *display,
+ struct intel_dpll *pll)
+{
+ struct intel_encoder *encoder = get_intel_encoder(display, pll);
+
+ if (drm_WARN_ON(display->drm, !encoder))
+ return;
+
+ intel_xe3plpd_pll_disable(encoder);
+}
+
static const struct intel_dpll_funcs xe3plpd_pll_funcs = {
.enable = xe3plpd_pll_enable,
+ .disable = xe3plpd_pll_disable,
.get_hw_state = xe3plpd_pll_get_hw_state,
.get_freq = xe3plpd_pll_get_freq,
};