}
else if (!OPTION_SET_P (flag_cunroll_grow_size))
flag_cunroll_grow_size = flag_peel_loops || optimize >= 3;
+
+ /* If we are inserting ROP-protect instructions, disable shrink wrap. */
+ if (rs6000_rop_protect)
+ flag_shrink_wrap = 0;
}
#ifdef TARGET_USES_LINUX64_OPT
&& ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY_ATOMIC) == 0))
rs6000_isa_flags |= OPTION_MASK_QUAD_MEMORY_ATOMIC;
- /* If we are inserting ROP-protect instructions, disable shrink wrap. */
- if (rs6000_rop_protect)
- flag_shrink_wrap = 0;
-
/* If we can shrink-wrap the TOC register save separately, then use
-msave-toc-indirect unless explicitly disabled. */
if ((rs6000_isa_flags_explicit & OPTION_MASK_SAVE_TOC_INDIRECT) == 0
--- /dev/null
+/* { dg-require-effective-target rop_ok } */
+/* { dg-options "-O1 -mrop-protect -mdejagnu-cpu=power10" } */
+
+extern void foo (void);
+
+long int
+__attribute__ ((__optimize__ ("no-inline")))
+func (long int cond)
+{
+ if (cond)
+ foo ();
+ return cond;
+}
+
+/* Ensure hashst comes after mflr and hashchk comes after ld 0,16(1). */
+/* { dg-final { scan-assembler {(?p)\mmflr 0.*\n.*\n.*\mhashst 0,} } } */
+/* { dg-final { scan-assembler {(?p)ld 0,.*\n.*\n.*\n.*\mhashchk 0,} } } */