Add support for 256-bit return values for dirty helpers (amd64 only).

(Patrick J. LoPresti, lopresti@gmail.com).  Bug 294285.

git-svn-id: svn://svn.valgrind.org/vex/trunk@2743

diff --git a/VEX/priv/host_amd64_isel.c b/VEX/priv/host_amd64_isel.c
index b85146bb5daff3da002f70cdf29d6ebf8244b66a..3eff9100c45fe401917ab633665b59de6402fd22 100644 (file)
--- a/VEX/priv/host_amd64_isel.c
+++ b/VEX/priv/host_amd64_isel.c
@@ -603,7 +603,6 @@ void doHelperCall ( /*OUT*/UInt*   stackAdjustAfterCall,
       addInstr(env, mk_iMOVsd_RR( hregAMD64_RSP(), r_vecRetAddr ));
    }
    else if (retTy == Ity_V256) {
-      vassert(0); //ATC
       r_vecRetAddr = newVRegI(env);
       sub_from_rsp(env, 32);
       addInstr(env, mk_iMOVsd_RR( hregAMD64_RSP(), r_vecRetAddr ));
@@ -680,7 +679,6 @@ void doHelperCall ( /*OUT*/UInt*   stackAdjustAfterCall,
             *stackAdjustAfterCall = 16;
             break;
          case Ity_V256:
-            vassert(0); // ATC
             *retloc = mk_RetLoc_spRel(RLPri_V256SpRel, 0);
             *stackAdjustAfterCall = 32;
             break;
@@ -4443,7 +4441,7 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
       switch (retty) {
          case Ity_INVALID: /* function doesn't return anything */
          case Ity_I64: case Ity_I32: case Ity_I16: case Ity_I8:
-         case Ity_V128:
+         case Ity_V128: case Ity_V256:
             retty_ok = True; break;
          default:
             break;
@@ -4490,6 +4488,19 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
             add_to_rsp(env, addToSp);
             return;
          }
+         case Ity_V256: {
+            /* See comments for Ity_V128. */
+            vassert(rloc.pri == RLPri_V256SpRel);
+            vassert(addToSp >= 32);
+            HReg        dstLo, dstHi;
+            lookupIRTempPair(&dstHi, &dstLo, env, d->tmp);
+            AMD64AMode* amLo  = AMD64AMode_IR(rloc.spOff, hregAMD64_RSP());
+            addInstr(env, AMD64Instr_SseLdSt( True/*load*/, 16, dstLo, amLo ));
+            AMD64AMode* amHi  = AMD64AMode_IR(rloc.spOff+16, hregAMD64_RSP());
+            addInstr(env, AMD64Instr_SseLdSt( True/*load*/, 16, dstHi, amHi ));
+            add_to_rsp(env, addToSp);
+            return;
+         }
          default:
             /*NOTREACHED*/
             vassert(0);