<include filename='x86_SandyBridge-IBRS.xml'/>
<include filename='x86_IvyBridge.xml'/>
<include filename='x86_IvyBridge-IBRS.xml'/>
+ <include filename='x86_IvyBridge-v1.xml'/>
+ <include filename='x86_IvyBridge-v2.xml'/>
<include filename='x86_Haswell-noTSX.xml'/>
<include filename='x86_Haswell-noTSX-IBRS.xml'/>
<include filename='x86_Haswell.xml'/>
'x86_Icelake-Server-v7.xml',
'x86_Icelake-Server.xml',
'x86_IvyBridge-IBRS.xml',
+ 'x86_IvyBridge-v1.xml',
+ 'x86_IvyBridge-v2.xml',
'x86_IvyBridge.xml',
'x86_kvm32.xml',
'x86_kvm64.xml',
--- /dev/null
+<cpus>
+ <model name='IvyBridge-v1'>
+ <decode host='on' guest='off'/>
+ <model name='IvyBridge'/>
+ </model>
+</cpus>
--- /dev/null
+<cpus>
+ <model name='IvyBridge-v2'>
+ <decode host='on' guest='off'/>
+ <model name='IvyBridge-IBRS'/>
+ </model>
+</cpus>
<cpu>
<arch>x86_64</arch>
- <model>IvyBridge</model>
+ <model>IvyBridge-v1</model>
<vendor>Intel</vendor>
<signature family='6' model='58' stepping='9'/>
<feature name='dtes64'/>
<cpu>
<arch>x86_64</arch>
- <model>IvyBridge</model>
+ <model>IvyBridge-v1</model>
<vendor>Intel</vendor>
<signature family='6' model='58' stepping='9'/>
<feature name='dtes64'/>
<cpu>
<arch>x86_64</arch>
- <model>IvyBridge</model>
+ <model>IvyBridge-v1</model>
<vendor>Intel</vendor>
<signature family='6' model='58' stepping='9'/>
<feature name='dtes64'/>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='x2apic'/>
<feature name='xsavec'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='x2apic'/>
<feature name='xsavec'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='avx'/>
+ <feature name='f16c'/>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ <feature name='x2apic'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='tsc-deadline'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='tsc-deadline'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='tsc-deadline'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='spec-ctrl'/>
+ <feature name='tsc-deadline'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
- <model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
+ <model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v1</model>
+ <blockers model='IvyBridge-v1'>
+ <feature name='erms'/>
+ </blockers>
+ <model usable='no' vendor='Intel'>IvyBridge-v2</model>
+ <blockers model='IvyBridge-v2'>
+ <feature name='erms'/>
+ <feature name='spec-ctrl'/>
+ </blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>