u16 mask = DCFM | DRPD | DPRPU | HSE | USBE;
u16 val = HSE | USBE;
+ /* CNEN bit is required for function operation */
+ if (usbhs_get_dparam(priv, has_cnen)) {
+ mask |= CNEN;
+ val |= CNEN;
+ }
+
/*
* if enable
*
{
struct usbhs_priv_otg_data *otg_priv = dev_get_priv(dev);
struct usbhs_priv *priv = &otg_priv->usbhs_priv;
+ struct renesas_usbhs_driver_param *plat_param;
int ret;
+ plat_param = (struct renesas_usbhs_driver_param *)dev_get_driver_data(dev);
+
priv->dparam.type = USBHS_TYPE_RCAR_GEN3;
priv->dparam.pio_dma_border = 64;
priv->dparam.pipe_configs = usbhsc_new_pipe;
priv->dparam.pipe_size = ARRAY_SIZE(usbhsc_new_pipe);
+ if (plat_param) {
+ priv->dparam.has_cnen = plat_param->has_cnen;
+ priv->dparam.cfifo_byte_addr = plat_param->cfifo_byte_addr;
+ }
+
/* call pipe and module init */
ret = usbhs_pipe_probe(priv);
if (ret < 0)
return dm_scan_fdt_dev(dev);
}
+static struct renesas_usbhs_driver_param rzg2l_param = {
+ .has_cnen = 1,
+ .cfifo_byte_addr = 1,
+};
+
static const struct udevice_id usbhs_udc_otg_ids[] = {
{ .compatible = "renesas,rcar-gen3-usbhs" },
+ { .compatible = "renesas,rzg2l-usbhs", .data = (unsigned long)&rzg2l_param },
{},
};
u32 has_otg:1; /* for controlling PWEN/EXTLP */
u32 has_sudmac:1; /* for SUDMAC */
u32 has_usb_dmac:1; /* for USB-DMAC */
+ u32 has_cnen:1;
u32 cfifo_byte_addr:1; /* CFIFO is byte addressable */
#define USBHS_USB_DMAC_XFER_SIZE 32 /* hardcode the xfer size */
u32 multi_clks:1;