arm: improve tests for vmin*

author Andrea Corallo <andrea.corallo@arm.com>

Mon, 10 Oct 2022 14:21:40 +0000 (16:21 +0200)

committer Andrea Corallo <andrea.corallo@arm.com>

Mon, 28 Nov 2022 09:06:14 +0000 (10:06 +0100)
author Andrea Corallo <andrea.corallo@arm.com>
Mon, 10 Oct 2022 14:21:40 +0000 (16:21 +0200)
committer Andrea Corallo <andrea.corallo@arm.com>
Mon, 28 Nov 2022 09:06:14 +0000 (10:06 +0100)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c

index 0324110c6a837c50d308bc5db66ef56b0aef5e42..925b9154ca7144e5d718edf4335bfed181ce0cc5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminat.s16      q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminaq_m_s16 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vminat.s16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminat.s16      q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c

index a2886d4f40f042b55bf3a5e059f5ed0f704ba255..296f69dfcdadb720a2ef3d6364f6433ea457f6ef 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminat.s32      q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminaq_m_s32 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vminat.s32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminat.s32      q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c

index 95eb038efc08544bc7a3aa055da05ee7eb7157aa..cf6fecc3461b4a8c9068bc571a1ac64ecc4a016a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminat.s8       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminaq_m_s8 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vminat.s8"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminat.s8       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminaq_m (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c

index 3a157e00a2797dd4c035dc1fe94e43a534295135..63f59f8c80a4874947fca915c3795c4b6e643a3f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmina.s16       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint16x8_t
  foo (uint16x8_t a, int16x8_t b)
  {
    return vminaq_s16 (a, b);
  }
  
-/* { dg-final { scan-assembler "vmina.s16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmina.s16       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint16x8_t
  foo1 (uint16x8_t a, int16x8_t b)
  {
    return vminaq (a, b);
  }
  
-/* { dg-final { scan-assembler "vmina.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c

index 5c732c65d639181843cf6df65b0a28da32a8b566..eb0a54cbe19e533e6457b82d5f99ae1622533cee 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmina.s32       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint32x4_t
  foo (uint32x4_t a, int32x4_t b)
  {
    return vminaq_s32 (a, b);
  }
  
-/* { dg-final { scan-assembler "vmina.s32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmina.s32       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint32x4_t
  foo1 (uint32x4_t a, int32x4_t b)
  {
    return vminaq (a, b);
  }
  
-/* { dg-final { scan-assembler "vmina.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c

index 2e4dad141ce7ec066d0b36a96813b48e6d56b9c0..b875308863dda567e3062f0fa6b4544f7033e085 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmina.s8        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint8x16_t
  foo (uint8x16_t a, int8x16_t b)
  {
    return vminaq_s8 (a, b);
  }
  
-/* { dg-final { scan-assembler "vmina.s8"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmina.s8        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  uint8x16_t
  foo1 (uint8x16_t a, int8x16_t b)
  {
    return vminaq (a, b);
  }
  
-/* { dg-final { scan-assembler "vmina.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c

index 9303ae02e39f38c0152f9279f7823b11e14486f0..5d3c40fb1fc3078b464feddcb36c9fcfeee73f4a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminavt.s16     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint16_t
  foo (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
@@ -11,18 +22,36 @@ foo (uint16_t a, int16x8_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminavt.s16     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint16_t
  foo1 (uint16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
-
-int16_t
-foo2 (uint8_t a, int16x8_t b, mve_pred16_t p)
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminavt.s16     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
+uint16_t
+foo2 (int16x8_t b, mve_pred16_t p)
  {
-  return vminavq_p (a, b, p);
+  return vminavq_p (1, b, p);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminavt.s16" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c

index 36247f68b2cbc192926a76a27eaf607ea88d2764..ee4ff251d63868d13a1619e0d1f5f26b22aa54ea 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminavt.s32     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint32_t
  foo (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
@@ -11,18 +22,36 @@ foo (uint32_t a, int32x4_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminavt.s32     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint32_t
  foo1 (uint32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
-
-int32_t
-foo2 (uint16_t a, int32x4_t b, mve_pred16_t p)
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminavt.s32     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
+uint32_t
+foo2 (int32x4_t b, mve_pred16_t p)
  {
-  return vminavq_p (a, b, p);
+  return vminavq_p (1, b, p);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminavt.s32" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c

index d3361615dcc983e3d42ce2772441f74a00e13d5e..14602c29719e4bbd5e0b38125938835d66e58b56 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminavt.s8      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint8_t
  foo (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
@@ -11,18 +22,36 @@ foo (uint8_t a, int8x16_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminavt.s8      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint8_t
  foo1 (uint8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminavq_p (a, b, p);
  }
  
-
-int8_t
-foo2 (uint32_t a, int8x16_t b, mve_pred16_t p)
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminavt.s8      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
+uint8_t
+foo2 (int8x16_t b, mve_pred16_t p)
  {
-  return vminavq_p (a, b, p);
+  return vminavq_p (1, b, p);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminavt.s8" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c

index 17e4edca2f1acf8f94a22a9e9dae4c7868c0b455..51f75ae1f6a52ffcf02406551b8144dc12ea225f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminav.s16      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint16_t
  foo (uint16_t a, int16x8_t b)
  {
@@ -11,18 +18,28 @@ foo (uint16_t a, int16x8_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminav.s16      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint16_t
  foo1 (uint16_t a, int16x8_t b)
  {
    return vminavq (a, b);
  }
  
-
-int16_t
-foo2 (uint8_t a, int16x8_t b)
+/*
+**foo2:
+**     ...
+**     vminav.s16      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
+uint16_t
+foo2 (int16x8_t b)
  {
-  return vminavq (a, b);
+  return vminavq (1, b);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminav.s16" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c

index 032d02b885750c9b7077681ac7618c063b160ae0..d1602cebe189dbfe60c7cc5e7a0f55900a7bdb19 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminav.s32      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint32_t
  foo (uint32_t a, int32x4_t b)
  {
@@ -11,18 +18,28 @@ foo (uint32_t a, int32x4_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminav.s32      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint32_t
  foo1 (uint32_t a, int32x4_t b)
  {
    return vminavq (a, b);
  }
  
-
-int32_t
-foo2 (uint16_t a, int32x4_t b)
+/*
+**foo2:
+**     ...
+**     vminav.s32      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
+uint32_t
+foo2 (int32x4_t b)
  {
-  return vminavq (a, b);
+  return vminavq (1, b);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminav.s32" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c

index 2a2bb3d614674652ac3a8a7956a2d394f36f27a8..f4c9b045b90c41d8fba47cd38f48fe6babff197f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminav.s8       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint8_t
  foo (uint8_t a, int8x16_t b)
  {
@@ -11,18 +18,28 @@ foo (uint8_t a, int8x16_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminav.s8       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint8_t
  foo1 (uint8_t a, int8x16_t b)
  {
    return vminavq (a, b);
  }
  
-
-int8_t
-foo2 (uint32_t a, int8x16_t b)
+/*
+**foo2:
+**     ...
+**     vminav.s8       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
+uint8_t
+foo2 (int8x16_t b)
  {
-  return vminavq (a, b);
+  return vminavq (1, b);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminav.s8" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c

index cf32186d6429525fc41fc823c7c59dadf9071dd5..1728d1042663e0894380d3a75ea79e3a4eeccffb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminnma.f16     q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vminnmaq_f16 (a, b);
  }
  
-/* { dg-final { scan-assembler "vminnma.f16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vminnma.f16     q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vminnmaq (a, b);
  }
  
-/* { dg-final { scan-assembler "vminnma.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c

index 1c3f19c9e1b81b7f73280fbc34185d847070e842..42b4265d9cc06a89fc3808ee960484a93fc25971 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminnma.f32     q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vminnmaq_f32 (a, b);
  }
  
-/* { dg-final { scan-assembler "vminnma.f32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vminnma.f32     q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vminnmaq (a, b);
  }
  
-/* { dg-final { scan-assembler "vminnma.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c

index 4423903e9135b0e4f9863daa0db3393d0d590f06..51b85bd2b04e8bb07eaf623567fed36d103b9f3a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmat.f16    q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmaq_m_f16 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vminnmat.f16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmat.f16    q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmaq_m (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c

index 683f40ad3d8a2a530825d9e5a8f55a6c903218fd..2f0423ecb4f8175e220fafbdd024c2358dbccff6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmat.f32    q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmaq_m_f32 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vminnmat.f32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmat.f32    q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmaq_m (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c

index fadb23e05c847a8f15b9ac1f15d8e6c89a1b34bc..17e4ad16759bd36b042742e7326e6a3031dbd0f7 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminnmav.f16    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
  foo (float16_t a, float16x8_t b)
  {
@@ -11,18 +18,28 @@ foo (float16_t a, float16x8_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminnmav.f16    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vminnmavq (a, b);
  }
  
-
+/*
+**foo2:
+**     ...
+**     vminnmav.f16    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
-foo2 (float32_t a, float16x8_t b)
+foo2 (float16x8_t b)
  {
-  return vminnmavq (a, b);
+  return vminnmavq (1.1, b);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminnmav.f16" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c

index 84714a96b9f54c3aba7aad7bfa6e6ff7758e5679..2758e59666e73616e1d4c2fa5d86bd3773a91d79 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminnmav.f32    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
  foo (float32_t a, float32x4_t b)
  {
@@ -11,18 +18,28 @@ foo (float32_t a, float32x4_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminnmav.f32    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vminnmavq (a, b);
  }
  
-
+/*
+**foo2:
+**     ...
+**     vminnmav.f32    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
-foo2 (float16_t a, float32x4_t b)
+foo2 (float32x4_t b)
  {
-  return vminnmavq (a, b);
+  return vminnmavq (1.1, b);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminnmav.f32" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c

index c79fa307ae024e3c8d8697654af580f460bf4415..b60a6627aeab4656bafc9ba7653569ab3a25b025 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmavt.f16   (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
  foo (float16_t a, float16x8_t b, mve_pred16_t p)
  {
@@ -11,18 +22,36 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmavt.f16   (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmavq_p (a, b, p);
  }
  
-
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmavt.f16   (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
-foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+foo2 (float16x8_t b, mve_pred16_t p)
  {
-  return vminnmavq_p (a, b, p);
+  return vminnmavq_p (1.1, b, p);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminnmavt.f16" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c

index bea04c7aac699dad5f21adc8aa3f8be070557855..6fa97b74a65fb6ce79909f9369ec32cdd355b399 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmavt.f32   (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
  foo (float32_t a, float32x4_t b, mve_pred16_t p)
  {
@@ -11,18 +22,36 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmavt.f32   (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmavq_p (a, b, p);
  }
  
-
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmavt.f32   (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
-foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+foo2 (float32x4_t b, mve_pred16_t p)
  {
-  return vminnmavq_p (a, b, p);
+  return vminnmavq_p (1.1, b, p);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminnmavt.f32" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c

index 18d4a4c1330adfe131b598b39257d3b19fb16898..c0962b52631b4d0ca2e1f2088f12a0c46dd1d465 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminnm.f16      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float16x8_t
  foo (float16x8_t a, float16x8_t b)
  {
    return vminnmq_f16 (a, b);
  }
  
-/* { dg-final { scan-assembler "vminnm.f16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vminnm.f16      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b)
  {
    return vminnmq (a, b);
  }
  
-/* { dg-final { scan-assembler "vminnm.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c

index 34144cad17fb6acbeacae979e4b46879de4e03d3..a9c3e5f74b1364b344077ad8a4d9ad73b6392dac 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminnm.f32      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float32x4_t
  foo (float32x4_t a, float32x4_t b)
  {
    return vminnmq_f32 (a, b);
  }
  
-/* { dg-final { scan-assembler "vminnm.f32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vminnm.f32      q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b)
  {
    return vminnmq (a, b);
  }
  
-/* { dg-final { scan-assembler "vminnm.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c

index e5533d280356648e1c00af9e0398e6ec0cb4f6a4..466264249c539affefd7286fe31f91b7454e6bf9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c
@@ -1,23 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmt.f16     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float16x8_t
  foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_m_f16 (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vminnmt.f16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmt.f16     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float16x8_t
  foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_m (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vminnmt.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c

index 382d16c44896d6a59c152222b65063f961100c09..57edc8e1a806b47d6ac420b8595775e4036f507b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c
@@ -1,23 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmt.f32     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float32x4_t
  foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_m_f32 (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vminnmt.f32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmt.f32     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float32x4_t
  foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_m (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vminnmt.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c

index 04d606ce5cd22df46816ef8116126064e08ffa68..73b4ccba08085791445855b344f5b6b7a615a12e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmt.f16     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float16x8_t
  foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_x_f16 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vminnmt.f16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmt.f16     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float16x8_t
  foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmq_x (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c

index 87cd970fd116550adfd07d43cba31e3479be38e2..9a824566212743a6fb84eb564a83a7b296237108 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmt.f32     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float32x4_t
  foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_x_f32 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vminnmt.f32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmt.f32     q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  float32x4_t
  foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmq_x (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c

index 0eb3a4af14ec57d60ec34bfc2d7210d8db60ef52..dc00d02df7d8d608e9701f1f0aa15e1bdd7904b1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminnmv.f16     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
  foo (float16_t a, float16x8_t b)
  {
@@ -11,18 +18,28 @@ foo (float16_t a, float16x8_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminnmv.f16     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
  foo1 (float16_t a, float16x8_t b)
  {
    return vminnmvq (a, b);
  }
  
-
+/*
+**foo2:
+**     ...
+**     vminnmv.f16     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
-foo2 (float32_t a, float16x8_t b)
+foo2 (float16x8_t b)
  {
-  return vminnmvq (a, b);
+  return vminnmvq (1.1, b);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminnmv.f16" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c

index f3183508f8e5088e7fa37aad0cca77c1014065d8..ff23c8184525e3aeec51803fc68e6f3ece95a407 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminnmv.f32     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
  foo (float32_t a, float32x4_t b)
  {
@@ -11,18 +18,28 @@ foo (float32_t a, float32x4_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminnmv.f32     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
  foo1 (float32_t a, float32x4_t b)
  {
    return vminnmvq (a, b);
  }
  
-
+/*
+**foo2:
+**     ...
+**     vminnmv.f32     (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
-foo2 (float16_t a, float32x4_t b)
+foo2 (float32x4_t b)
  {
-  return vminnmvq (a, b);
+  return vminnmvq (1.1, b);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminnmv.f32" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c

index 16f6ac514c86d99c87708a6a69eca984f15f769b..ad99f586d11303be7a686af4450c668c0436c38e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmvt.f16    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
  foo (float16_t a, float16x8_t b, mve_pred16_t p)
  {
@@ -11,18 +22,36 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmvt.f16    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
  foo1 (float16_t a, float16x8_t b, mve_pred16_t p)
  {
    return vminnmvq_p (a, b, p);
  }
  
-
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmvt.f16    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float16_t
-foo2 (float32_t a, float16x8_t b, mve_pred16_t p)
+foo2 (float16x8_t b, mve_pred16_t p)
  {
-  return vminnmvq_p (a, b, p);
+  return vminnmvq_p (1.1, b, p);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminnmvt.f16" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c

index a8e4f9ffba7286a4b77c97ac156d79e3be3355d4..3c7e5c07a687af260580ca084d4cda1dc1c87418 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
  /* { dg-add-options arm_v8_1m_mve_fp } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmvt.f32    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
  foo (float32_t a, float32x4_t b, mve_pred16_t p)
  {
@@ -11,18 +22,36 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmvt.f32    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
  foo1 (float32_t a, float32x4_t b, mve_pred16_t p)
  {
    return vminnmvq_p (a, b, p);
  }
  
-
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminnmvt.f32    (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  float32_t
-foo2 (float16_t a, float32x4_t b, mve_pred16_t p)
+foo2 (float32x4_t b, mve_pred16_t p)
  {
-  return vminnmvq_p (a, b, p);
+  return vminnmvq_p (1.1, b, p);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminnmvt.f32" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c

index f257ddcf600c285c2e78b167b7fef8d1a0a6c5b8..fe7368eeb383548bd63aae54c7e3f3d62901f1fc 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c
@@ -1,23 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int16x8_t
  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_m_s16 (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.s16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int16x8_t
  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c

index 957da71d0e3410dcb746b71c679351b3c2c216f1..a90a1db883563d9b3ddae835c933075237113c89 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c
@@ -1,23 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int32x4_t
  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_m_s32 (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.s32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int32x4_t
  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c

index fea8bfd799410dbcf26123aba8871b1665d13db7..911bd3af0dc02c9a67e4281e2b277df9c205cab6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c
@@ -1,23 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int8x16_t
  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_m_s8 (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.s8"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int8x16_t
  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c

index 7cc19a7dd5dce6e7dfe9610f032d2e2434637134..f80288aaf79a3d39e293192fdfb9a6e217227fa8 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c
@@ -1,23 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint16x8_t
  foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_m_u16 (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.u16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint16x8_t
  foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.u16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c

index 301fbfc751fb788a5f2158fdefe973336f75eeba..b480089f4f3adb76a5946e703e8809429a010c3e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c
@@ -1,23 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint32x4_t
  foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_m_u32 (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.u32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint32x4_t
  foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.u32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c

index 7a65b3557a3bf3db68a88243d4290f365937b664..73633c9612ecc113b14cefeb4bb8d423b4ec0eff 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c
@@ -1,23 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint8x16_t
  foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_m_u8 (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.u8"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint8x16_t
  foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_m (inactive, a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.u8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c

index d46a3c4ee18cafc2e0816b956b8a507597b1e4ab..eb34dc4c41c42d96770859120c6f92f30348e197 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmin.s16        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int16x8_t
  foo (int16x8_t a, int16x8_t b)
  {
    return vminq_s16 (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.s16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmin.s16        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b)
  {
    return vminq (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.s16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c

index 601e918a5bf28f52fbe416d39421105bdedee157..60d29da4e14f3b4a937b72a91e43b4edc696397e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmin.s32        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int32x4_t
  foo (int32x4_t a, int32x4_t b)
  {
    return vminq_s32 (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.s32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmin.s32        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b)
  {
    return vminq (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c

index e2ae2341ad8b687bd59d7a6d1d2a09365fa1be75..675fb8edfb13fcf2ef7e0954ee06eed478a72c84 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmin.s8 q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int8x16_t
  foo (int8x16_t a, int8x16_t b)
  {
    return vminq_s8 (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.s8"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmin.s8 q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b)
  {
    return vminq (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.s8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c

index 3cac573f6ef3a9246db0cab33abf436ad8f408a6..50f648d5133f7697efbe6a01f1808a1b6090d195 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmin.u16        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b)
  {
    return vminq_u16 (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.u16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmin.u16        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b)
  {
    return vminq (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.u16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c

index ca3ef245fe9b769d109980d12bd72645498c3cd8..bcfead39c5a68aea36cf1e14ce18d41a0a6055f1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmin.u32        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b)
  {
    return vminq_u32 (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.u32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmin.u32        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b)
  {
    return vminq (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.u32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c

index b7ef4db22ff1bc181955edf900a269eff9782b78..e8eacae4da86ef8a930fbecc1e6a32aeddbd22aa 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c
@@ -1,21 +1,33 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmin.u8 q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b)
  {
    return vminq_u8 (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.u8"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmin.u8 q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b)
  {
    return vminq (a, b);
  }
  
-/* { dg-final { scan-assembler "vmin.u8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c

index af93c78658ee58b2544d7988fcd187954359086e..0d8987e16b802c112883a1a037e88b8a2510cffc 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int16x8_t
  foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_x_s16 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.s16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int16x8_t
  foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c

index 76f0831e48eaf1854f019c8862da6d056386664a..3c3595171ead9307842c71930d9c1d5bdb41779a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int32x4_t
  foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_x_s32 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.s32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int32x4_t
  foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c

index fdd6e94497ccdeb4407b577b9cf3140327f8ab60..402c4aa121dc4f2d8350e2d611078d6fae54ed4d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int8x16_t
  foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_x_s8 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.s8"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.s8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  int8x16_t
  foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c

index 9842954c7613518cee7b2df748811387b4eca24e..e27a3416e388e2da6d3d6832a366ffea12f5706a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint16x8_t
  foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_x_u16 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.u16"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint16x8_t
  foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c

index 741e450887981d302bedb7b3836832801fd61219..d3cb29bf60c84c4222a6a71bfc0fdd9a2b228aff 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint32x4_t
  foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_x_u32 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.u32"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint32x4_t
  foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c

index 13743fc87a14d5948522a670d45fa604a7e0af45..3e05ef7dd1323e14da79b1c30d4795250891d7d5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c
@@ -1,22 +1,41 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint8x16_t
  foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_x_u8 (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmint.u8"  }  } */
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmint.u8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
  uint8x16_t
  foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminq_x (a, b, p);
  }
  
-/* { dg-final { scan-assembler "vpst" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c

index 91bb63f6ba6ea0dcafb22db612aa42d44a58de67..7c25c9d2f825b30990eafec2fca7c8424243a335 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.s16      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int16_t
  foo (int16_t a, int16x8_t b, mve_pred16_t p)
  {
@@ -11,18 +22,20 @@ foo (int16_t a, int16x8_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.s16      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int16_t
  foo1 (int16_t a, int16x8_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
-
-int16_t
-foo2 (int8_t a, int16x8_t b, mve_pred16_t p)
-{
-  return vminvq_p (a, b, p);
-}
-
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminvt.s16" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c

index a846701312c858cf2cb6d9d9c113ce9c5a31fb53..d5f7418af38c785186f71328256a18d57c1398f6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.s32      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int32_t
  foo (int32_t a, int32x4_t b, mve_pred16_t p)
  {
@@ -11,18 +22,20 @@ foo (int32_t a, int32x4_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.s32      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int32_t
  foo1 (int32_t a, int32x4_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
-
-int32_t
-foo2 (int16_t a, int32x4_t b, mve_pred16_t p)
-{
-  return vminvq_p (a, b, p);
-}
-
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminvt.s32" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c

index 716d414f3a7555de8738349b35df01d2a6f08832..6a42170fc191facc0db95216e344b997c88bacc8 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.s8       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int8_t
  foo (int8_t a, int8x16_t b, mve_pred16_t p)
  {
@@ -11,18 +22,20 @@ foo (int8_t a, int8x16_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.s8       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int8_t
  foo1 (int8_t a, int8x16_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
-
-int8_t
-foo2 (int32_t a, int8x16_t b, mve_pred16_t p)
-{
-  return vminvq_p (a, b, p);
-}
-
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminvt.s8" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c

index cc7f8fe8933d3e773f91a8605287709f94492097..8f2f68fef842fa0be0104596abcd813f3f772be0 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.u16      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint16_t
  foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
@@ -11,18 +22,36 @@ foo (uint16_t a, uint16x8_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.u16      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint16_t
  foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
-
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.u16      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint16_t
-foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p)
+foo2 (uint16x8_t b, mve_pred16_t p)
  {
-  return vminvq_p (a, b, p);
+  return vminvq_p (1, b, p);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminvt.u16" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c

index 6bde0be29ccf73a1cb36535a3d2677d4338c3da7..9d14c39c1dc1ed205c5f499a70e5a49efd3ad87e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.u32      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint32_t
  foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
@@ -11,18 +22,36 @@ foo (uint32_t a, uint32x4_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.u32      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint32_t
  foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
-
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.u32      (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint32_t
-foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p)
+foo2 (uint32x4_t b, mve_pred16_t p)
  {
-  return vminvq_p (a, b, p);
+  return vminvq_p (1, b, p);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminvt.u32" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c

index bb894904f3cfeee8c881bf7f2b13fb6d7e0f4f7a..4c1f4406852d56e6e6cc5ddfc8a64e26dd1aee59 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
@@ -1,9 +1,20 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.u8       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint8_t
  foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
@@ -11,18 +22,36 @@ foo (uint8_t a, uint8x16_t b, mve_pred16_t p)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.u8       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint8_t
  foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p)
  {
    return vminvq_p (a, b, p);
  }
  
-
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vminvt.u8       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint8_t
-foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p)
+foo2 (uint8x16_t b, mve_pred16_t p)
  {
-  return vminvq_p (a, b, p);
+  return vminvq_p (1, b, p);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminvt.u8" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c

index 6d589aa4a0506cd18fb4942e5511b14fe15a2811..e3242c0aa4d578d77f3c4f914becb90cfd390ec8 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminv.s16       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int16_t
  foo (int16_t a, int16x8_t b)
  {
@@ -11,17 +18,16 @@ foo (int16_t a, int16x8_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminv.s16       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int16_t
  foo1 (int16_t a, int16x8_t b)
  {
    return vminvq (a, b);
  }
  
-int16_t
-foo2 (int8_t a, int16x8_t b)
-{
-  return vminvq (a, b);
-}
-
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminv.s16" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c

index 7c727d6d92b05424aa8441bf8980355bee72f168..1325b38411d485828f040bd9fe19b29259915a0d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminv.s32       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int32_t
  foo (int32_t a, int32x4_t b)
  {
@@ -11,17 +18,16 @@ foo (int32_t a, int32x4_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminv.s32       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int32_t
  foo1 (int32_t a, int32x4_t b)
  {
    return vminvq (a, b);
  }
  
-int32_t
-foo2 (int8_t a, int32x4_t b)
-{
-  return vminvq (a, b);
-}
-
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminv.s32" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c

index 76309482fc56d6166d91f0845c3fb60dfdaaddfd..81c14a8ac6b8c7f093d7b2665a275c8691b025aa 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminv.s8        (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int8_t
  foo (int8_t a, int8x16_t b)
  {
@@ -11,17 +18,16 @@ foo (int8_t a, int8x16_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminv.s8        (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  int8_t
  foo1 (int8_t a, int8x16_t b)
  {
    return vminvq (a, b);
  }
  
-int8_t
-foo2 (int32_t a, int8x16_t b)
-{
-  return vminvq (a, b);
-}
-
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminv.s8" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c

index 698975f456c708697f4c4820970b08c6321d81fc..4372ac623883b79dd683e8885e9b01c124901458 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminv.u16       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint16_t
  foo (uint16_t a, uint16x8_t b)
  {
@@ -11,18 +18,28 @@ foo (uint16_t a, uint16x8_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminv.u16       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint16_t
  foo1 (uint16_t a, uint16x8_t b)
  {
    return vminvq (a, b);
  }
  
-
-uint8_t
-foo2 (uint32_t a, uint16x8_t b)
+/*
+**foo2:
+**     ...
+**     vminv.u16       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
+uint16_t
+foo2 (uint16x8_t b)
  {
-  return vminvq (a, b);
+  return vminvq (1, b);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminv.u16" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c

index 7489f81debfeda816fe29379b695afa50df3ac0e..aff3679f49d595f8972dabb4224fc3617288e288 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminv.u32       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint32_t
  foo (uint32_t a, uint32x4_t b)
  {
@@ -11,17 +18,28 @@ foo (uint32_t a, uint32x4_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminv.u32       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint32_t
  foo1 (uint32_t a, uint32x4_t b)
  {
    return vminvq (a, b);
  }
  
+/*
+**foo2:
+**     ...
+**     vminv.u32       (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint32_t
-foo2 (uint16_t a, uint32x4_t b)
+foo2 (uint32x4_t b)
  {
-  return vminvq (a, b);
+  return vminvq (1, b);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminv.u32" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c

index aa2b986d5587c2c7a79e86370cf179d5f8751db7..883e5f2d2c7ba9c06b07e910c0036e97822c4994 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
@@ -1,9 +1,16 @@
  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
  /* { dg-add-options arm_v8_1m_mve } */
  /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
  
  #include "arm_mve.h"
  
+/*
+**foo:
+**     ...
+**     vminv.u8        (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint8_t
  foo (uint8_t a, uint8x16_t b)
  {
@@ -11,18 +18,28 @@ foo (uint8_t a, uint8x16_t b)
  }
  
  
+/*
+**foo1:
+**     ...
+**     vminv.u8        (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
  uint8_t
  foo1 (uint8_t a, uint8x16_t b)
  {
    return vminvq (a, b);
  }
  
-
-uint16_t
-foo2 (uint32_t a, uint8x16_t b)
+/*
+**foo2:
+**     ...
+**     vminv.u8        (?:ip|fp|r[0-9]+), q[0-9]+(?:   @.*|)
+**     ...
+*/
+uint8_t
+foo2 (uint8x16_t b)
  {
-  return vminvq (a, b);
+  return vminvq (1, b);
  }
  
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
-/* { dg-final { scan-assembler-times "vminv.u8" 3 } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+\ No newline at end of file
author	Andrea Corallo <andrea.corallo@arm.com>
	Mon, 10 Oct 2022 14:21:40 +0000 (16:21 +0200)
committer	Andrea Corallo <andrea.corallo@arm.com>
	Mon, 28 Nov 2022 09:06:14 +0000 (10:06 +0100)
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c		patch \| blob \| blame \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c		patch \| blob \| blame \| history