]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
iommu/vt-d: Fix 64-bit accesses to 32-bit DMAR_GSTS_REG
authorCQ Tang <cq.tang@intel.com>
Wed, 13 Jan 2016 21:15:03 +0000 (21:15 +0000)
committerJiri Slaby <jslaby@suse.cz>
Thu, 25 Feb 2016 09:49:11 +0000 (10:49 +0100)
commit fda3bec12d0979aae3f02ee645913d66fbc8a26e upstream.

This is a 32-bit register. Apparently harmless on real hardware, but
causing justified warnings in simulation.

Signed-off-by: CQ Tang <cq.tang@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
drivers/iommu/dmar.c
drivers/iommu/intel_irq_remapping.c

index 785675a56a10f8117b052ff06bf4e9b462e720b5..ba5d1a37a90d183e85453445c416e453ec283be5 100644 (file)
@@ -972,7 +972,7 @@ void dmar_disable_qi(struct intel_iommu *iommu)
 
        raw_spin_lock_irqsave(&iommu->register_lock, flags);
 
-       sts =  dmar_readq(iommu->reg + DMAR_GSTS_REG);
+       sts =  readl(iommu->reg + DMAR_GSTS_REG);
        if (!(sts & DMA_GSTS_QIES))
                goto end;
 
index b97d70b1abe0c7778524123f35e5bb6f6cb2d7b1..0ff40be0f3b2ff3833efc710f1ac0099ff18776d 100644 (file)
@@ -495,7 +495,7 @@ static void iommu_disable_irq_remapping(struct intel_iommu *iommu)
 
        raw_spin_lock_irqsave(&iommu->register_lock, flags);
 
-       sts = dmar_readq(iommu->reg + DMAR_GSTS_REG);
+       sts = readl(iommu->reg + DMAR_GSTS_REG);
        if (!(sts & DMA_GSTS_IRES))
                goto end;