Add support for ARMv8-M security extension

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index bcedf8884937cc7ac72c1570aea0079ffd3f9232..6ee30fe5cc2ed1f7a6b042d42eb2a4888d697b73 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -20550,8 +20550,13 @@ static const struct asm_opcode insns[] =
 #define ARM_VARIANT NULL
 #undef  THUMB_VARIANT
 #define THUMB_VARIANT & arm_ext_v8m
+ TUE("sg", 0, e97fe97f, 0, (), 0, noargs),
+ TUE("blxns", 0, 4784, 1, (RRnpc), 0, t_blx),
+ TUE("bxns", 0, 4704, 1, (RRnpc), 0, t_bx),
  TUE("tt", 0, e840f000, 2, (RRnpc, RRnpc), 0, tt),
  TUE("ttt", 0, e840f040, 2, (RRnpc, RRnpc), 0, tt),
+ TUE("tta", 0, e840f080, 2, (RRnpc, RRnpc), 0, tt),
+ TUE("ttat", 0, e840f0c0, 2, (RRnpc, RRnpc), 0, tt),
 };
 #undef ARM_VARIANT
 #undef THUMB_VARIANT

diff --git a/gas/testsuite/gas/arm/any-cmse.d b/gas/testsuite/gas/arm/any-cmse.d
new file mode 100644 (file)
index 0000000..212c43c
--- /dev/null
+++ b/gas/testsuite/gas/arm/any-cmse.d
@@ -0,0 +1,11 @@
+#name: attributes for 'any' CPU with ARMv8-M security extension instructions
+#source: archv8m-cmse.s
+#as:
+#readelf: -A
+# target: *-*-*eabi* *-*-nacl*
+
+Attribute Section: aeabi
+File Attributes
+  Tag_CPU_arch: v8-M.baseline
+  Tag_CPU_arch_profile: Microcontroller
+  Tag_THUMB_ISA_use: Yes

diff --git a/gas/testsuite/gas/arm/archv8m-cmse-base.d b/gas/testsuite/gas/arm/archv8m-cmse-base.d
new file mode 100644 (file)
index 0000000..30141af
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv8m-cmse-base.d
@@ -0,0 +1,17 @@
+#name: ARM V8-M baseline instructions
+#source: archv8m-cmse.s
+#as: -march=armv8-m.base
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+.* <[^>]*> e97f e97f         sg
+0+.* <[^>]*> 47a4              blxns   r4
+0+.* <[^>]*> 47cc              blxns   r9
+0+.* <[^>]*> 4724              bxns    r4
+0+.* <[^>]*> 474c              bxns    r9
+0+.* <[^>]*> e841 f080         tta     r0, r1
+0+.* <[^>]*> e849 f880         tta     r8, r9
+0+.* <[^>]*> e841 f0c0         ttat    r0, r1
+0+.* <[^>]*> e849 f8c0         ttat    r8, r9

diff --git a/gas/testsuite/gas/arm/archv8m-cmse-main.d b/gas/testsuite/gas/arm/archv8m-cmse-main.d
new file mode 100644 (file)
index 0000000..cd6e6a2
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv8m-cmse-main.d
@@ -0,0 +1,17 @@
+#name: ARM V8-M mainline instructions
+#source: archv8m-cmse.s
+#as: -march=armv8-m.main
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+.* <[^>]*> e97f e97f         sg
+0+.* <[^>]*> 47a4              blxns   r4
+0+.* <[^>]*> 47cc              blxns   r9
+0+.* <[^>]*> 4724              bxns    r4
+0+.* <[^>]*> 474c              bxns    r9
+0+.* <[^>]*> e841 f080         tta     r0, r1
+0+.* <[^>]*> e849 f880         tta     r8, r9
+0+.* <[^>]*> e841 f0c0         ttat    r0, r1
+0+.* <[^>]*> e849 f8c0         ttat    r8, r9

diff --git a/gas/testsuite/gas/arm/archv8m-cmse.s b/gas/testsuite/gas/arm/archv8m-cmse.s
new file mode 100644 (file)
index 0000000..520550c
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv8m-cmse.s
@@ -0,0 +1,12 @@
+.thumb
+.syntax unified
+
+sg
+blxns r4
+blxns r9
+bxns  r4
+bxns  r9
+tta   r0, r1
+tta   r8, r9
+ttat  r0, r1
+ttat  r8, r9

diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 0e91b68176ba0de6d9c7899c0ab3338d3b6e304a..3e8afdf2bc3e4e3474325c5c5dd6106a280f92db 100644 (file)
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -2320,6 +2320,10 @@ static const struct opcode16 thumb_opcodes[] =
 {
   /* Thumb instructions.  */
 
+  /* ARM V8-M instructions.  */
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4784, 0xff87, "blxns\t%3-6r"},
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4704, 0xff07, "bxns\t%3-6r"},
+
   /* ARM V8 instructions.  */
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V8),  0xbf50, 0xffff, "sevl%c"},
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V8),  0xba80, 0xffc0, "hlt\t%0-5x"},
@@ -2526,10 +2530,15 @@ static const struct opcode16 thumb_opcodes[] =
 static const struct opcode32 thumb32_opcodes[] =
 {
   /* V8-M instructions.  */
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0xe97fe97f, 0xffffffff, "sg"},
   {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M),
     0xe840f000, 0xfff0f0ff, "tt\t%8-11r, %16-19r"},
   {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M),
     0xe840f040, 0xfff0f0ff, "ttt\t%8-11r, %16-19r"},
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M),
+    0xe840f080, 0xfff0f0ff, "tta\t%8-11r, %16-19r"},
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M),
+    0xe840f0c0, 0xfff0f0ff, "ttat\t%8-11r, %16-19r"},
 
   /* V8 instructions.  */
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V8),