gpio: sifive: Support IRQ wake

Each pin drives a separate interrupt in the parent IRQ domain, so there
is no need to set IRQCHIP_MASK_ON_SUSPEND.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c
index 745e5f67254ea2715ae7d3241468bd7ffe85fed1..efab7b58f739130035522e57ccf7c3ddaa1c44d4 100644 (file)
--- a/drivers/gpio/gpio-sifive.c
+++ b/drivers/gpio/gpio-sifive.c
@@ -150,6 +150,7 @@ static const struct irq_chip sifive_gpio_irqchip = {
        .irq_disable    = sifive_gpio_irq_disable,
        .irq_eoi        = sifive_gpio_irq_eoi,
        .irq_set_affinity = sifive_gpio_irq_set_affinity,
+       .irq_set_wake   = irq_chip_set_wake_parent,
        .flags          = IRQCHIP_IMMUTABLE,
        GPIOCHIP_IRQ_RESOURCE_HELPERS,
 };