]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
PCI/AER: Replace PCIEAER_CXL symbol with CXL_RAS
authorDan Williams <dan.j.williams@intel.com>
Wed, 14 Jan 2026 18:20:34 +0000 (12:20 -0600)
committerDave Jiang <dave.jiang@intel.com>
Thu, 22 Jan 2026 22:06:54 +0000 (15:06 -0700)
One of the primary reasons for the CXL driver to exist is to perform error
handling. If both PCIEAER and CXL are enabled then light up CXL error
handling as well. Now that all RAS handling is moved under the CXL_RAS
symbol, drop the previous PCIEAER_CXL symbol.

Reviewed-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Link: https://patch.msgid.link/20260114182055.46029-14-terry.bowman@amd.com
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
drivers/cxl/Kconfig
drivers/pci/pcie/Kconfig

index 217888992c882a5a877f02a91c8d1f9749ea8953..70acddc08c399dfc5d2824870858be22309c7433 100644 (file)
@@ -235,6 +235,6 @@ config CXL_MCE
 
 config CXL_RAS
        def_bool y
-       depends on ACPI_APEI_GHES && PCIEAER && CXL_PCI
+       depends on ACPI_APEI_GHES && PCIEAER && CXL_BUS
 
 endif
index 17919b99fa66a4eed6be77ba2e27a20a4b3e8b21..207c2deae35ff0aa77e88314559ac7025154a77a 100644 (file)
@@ -49,15 +49,6 @@ config PCIEAER_INJECT
          gotten from:
             https://github.com/intel/aer-inject.git
 
-config PCIEAER_CXL
-       bool "PCI Express CXL RAS support"
-       default y
-       depends on PCIEAER && CXL_PCI
-       help
-         Enables CXL error handling.
-
-         If unsure, say Y.
-
 #
 # PCI Express ECRC
 #