re PR target/34856 (ICE with some constant vectors)

	PR target/34856
	* simplifx-rtx.c (simplify_const_binary_operation) [VEC_CONCAT]:
	Consider only CONST_INT, CONST_DOUBLE and CONST_FIXED as constant
	vector elements.

testsuite/ChangeLog:

	PR target/34856
	* gcc.dg/pr34856.c: Use pointer mode for "pin".

From-SVN: r131821

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5b208cbf9fbe472e8200e8508869743f00a675f7..4e065f4cde7a0d0edbd317817e0a7f34a134f59b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2008-01-25  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/34856
+       * simplifx-rtx.c (simplify_const_binary_operation) [VEC_CONCAT]:
+       Consider only CONST_INT, CONST_DOUBLE and CONST_FIXED as constant
+       vector elements.
+
 2008-01-25  Jakub Jelinek  <jakub@redhat.com>
 
        PR middle-end/33333

diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index fd14e407dc841f20fbe47665493e3a8fdcac176d..f8756040ce0f17d6e6162ecf474f5a08d5268d6e 100644 (file)
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -2916,7 +2916,12 @@ simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode,
 
   if (VECTOR_MODE_P (mode)
       && code == VEC_CONCAT
-      && CONSTANT_P (op0) && CONSTANT_P (op1))
+      && (CONST_INT_P (op0)
+         || GET_CODE (op0) == CONST_DOUBLE
+         || GET_CODE (op0) == CONST_FIXED)
+      && (CONST_INT_P (op1)
+         || GET_CODE (op1) == CONST_DOUBLE
+         || GET_CODE (op1) == CONST_FIXED))
     {
       unsigned n_elts = GET_MODE_NUNITS (mode);
       rtvec v = rtvec_alloc (n_elts);

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 392f7a5993b207cceaa596a59cf5fc9d221ea642..007bb71c1ca966a05b202d5be4698f6776bfece9 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2008-01-25  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/34856
+       * gcc.dg/pr34856.c: Use pointer mode for "pin".
+
 2008-01-25  Jakub Jelinek  <jakub@redhat.com>
 
        PR middle-end/33333
@@ -9,7 +14,7 @@
 
 2008-01-25  Olga Golovanevsky  <olga@il.ibm.com>
 
-        * gcc.dg/struct/wo_prof_malloc_size_var.c: UnXFAIL.
+       * gcc.dg/struct/wo_prof_malloc_size_var.c: UnXFAIL.
 
 2008-01-24  Daniel Franke  <franke.daniel@gmail.com>
 

diff --git a/gcc/testsuite/gcc.dg/pr34856.c b/gcc/testsuite/gcc.dg/pr34856.c
index 7900cc3472b7eab5c8c96445f955b2a4bdb5397c..786639b3575a40019d4da8488894fbc623e14160 100644 (file)
--- a/gcc/testsuite/gcc.dg/pr34856.c
+++ b/gcc/testsuite/gcc.dg/pr34856.c
@@ -2,11 +2,13 @@
 /* { dg-options "-O2" } */
 /* { dg-options "-O2 -msse2" { target { i?86-*-* x86_64-*-* } } } */
 
+typedef unsigned __attribute__ ((__mode__ (__pointer__))) uintptr_t;
+
 #undef __vector
-#define __vector __attribute__((vector_size(16) ))
+#define __vector __attribute__ ((__vector_size__ (16)))
 
 typedef __vector signed char qword;
-typedef __vector unsigned int VU32;
+typedef __vector uintptr_t VU;
 
 extern short g[192 + 16];
 
@@ -14,8 +16,9 @@ void f (qword);
 
 void f1 (unsigned ctr)
 {
-  VU32 pin;
-  pin = (VU32){(unsigned int) &g[16]};
+  VU pin;
+
+  pin = (VU){(uintptr_t) &g[16]};
   do
     {
       f ((qword) pin);