emit_insn (gen_add2_insn (stack_pointer_rtx, op0));
aarch64_set_frame_expr (gen_rtx_SET
(Pmode, stack_pointer_rtx,
- gen_rtx_PLUS (Pmode,
- stack_pointer_rtx,
- GEN_INT (-frame_size))));
+ plus_constant (Pmode,
+ stack_pointer_rtx,
+ -frame_size)));
}
else if (frame_size > 0)
{
GEN_INT (fp_offset)));
aarch64_set_frame_expr (gen_rtx_SET
(Pmode, hard_frame_pointer_rtx,
- gen_rtx_PLUS (Pmode,
- stack_pointer_rtx,
- GEN_INT (fp_offset))));
+ plus_constant (Pmode,
+ stack_pointer_rtx,
+ fp_offset)));
RTX_FRAME_RELATED_P (insn) = 1;
insn = emit_insn (gen_stack_tie (stack_pointer_rtx,
hard_frame_pointer_rtx));
emit_insn (gen_add2_insn (stack_pointer_rtx, op0));
aarch64_set_frame_expr (gen_rtx_SET
(Pmode, stack_pointer_rtx,
- gen_rtx_PLUS (Pmode,
- stack_pointer_rtx,
- GEN_INT (frame_size))));
+ plus_constant (Pmode,
+ stack_pointer_rtx,
+ frame_size)));
}
else if (frame_size > 0)
{
}
}
- aarch64_set_frame_expr (gen_rtx_SET (Pmode, stack_pointer_rtx,
- gen_rtx_PLUS (Pmode,
- stack_pointer_rtx,
- GEN_INT (offset))));
+ aarch64_set_frame_expr (gen_rtx_SET (Pmode, stack_pointer_rtx,
+ plus_constant (Pmode,
+ stack_pointer_rtx,
+ offset)));
}
emit_use (gen_rtx_REG (DImode, LR_REGNUM));
/* Reload high part into base reg, leaving the low part
in the mem instruction. */
- x = gen_rtx_PLUS (xmode,
- gen_rtx_PLUS (xmode, XEXP (x, 0), cst),
- GEN_INT (low));
+ x = plus_constant (xmode,
+ gen_rtx_PLUS (xmode, XEXP (x, 0), cst),
+ low);
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, xmode, VOIDmode, 0, 0,