]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: renesas: r9a09g047: Add RSPI nodes
authorTommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Tue, 17 Feb 2026 16:23:48 +0000 (17:23 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 23 Mar 2026 09:26:20 +0000 (10:26 +0100)
Add nodes for the RSPI IPs found in the Renesas RZ/G3E SoC.

Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/c8df5202caf4e36ee5beafe78ad0940643edcbb6.1771344527.git.tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a09g047.dtsi

index cbb48ff5028fcc0aac6ba9b118571558d1e5ce9a..94d23cc013f73b52e0366f6f7c88beee1d51b81a 100644 (file)
                        };
                };
 
+               rspi0: spi@12800000 {
+                       compatible = "renesas,r9a09g047-rspi", "renesas,r9a09g057-rspi";
+                       reg = <0x0 0x12800000 0x0 0x400>;
+                       interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 107 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 500 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 501 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "idle", "error", "end", "rx", "tx";
+                       clocks = <&cpg CPG_MOD 0x54>,
+                                <&cpg CPG_MOD 0x55>,
+                                <&cpg CPG_MOD 0x56>;
+                       clock-names = "pclk", "pclk_sfr", "tclk";
+                       resets = <&cpg 0x7b>, <&cpg 0x7c>;
+                       reset-names = "presetn", "tresetn";
+                       dmas = <&dmac0 0x448c>, <&dmac0 0x448d>,
+                              <&dmac1 0x448c>, <&dmac1 0x448d>,
+                              <&dmac2 0x448c>, <&dmac2 0x448d>,
+                              <&dmac3 0x448c>, <&dmac3 0x448d>,
+                              <&dmac4 0x448c>, <&dmac4 0x448d>;
+                       dma-names = "rx", "tx", "rx", "tx", "rx", "tx",
+                                   "rx", "tx", "rx", "tx";
+                       power-domains = <&cpg>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               rspi1: spi@12800400 {
+                       compatible = "renesas,r9a09g047-rspi", "renesas,r9a09g057-rspi";
+                       reg = <0x0 0x12800400 0x0 0x400>;
+                       interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 502 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 503 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "idle", "error", "end", "rx", "tx";
+                       clocks = <&cpg CPG_MOD 0x57>,
+                                <&cpg CPG_MOD 0x58>,
+                                <&cpg CPG_MOD 0x59>;
+                       clock-names = "pclk", "pclk_sfr", "tclk";
+                       resets = <&cpg 0x7d>, <&cpg 0x7e>;
+                       reset-names = "presetn", "tresetn";
+                       dmas = <&dmac0 0x448e>, <&dmac0 0x448f>,
+                              <&dmac1 0x448e>, <&dmac1 0x448f>,
+                              <&dmac2 0x448e>, <&dmac2 0x448f>,
+                              <&dmac3 0x448e>, <&dmac3 0x448f>,
+                              <&dmac4 0x448e>, <&dmac4 0x448f>;
+                       dma-names = "rx", "tx", "rx", "tx", "rx", "tx",
+                                   "rx", "tx", "rx", "tx";
+                       power-domains = <&cpg>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               rspi2: spi@12800800 {
+                       compatible = "renesas,r9a09g047-rspi", "renesas,r9a09g057-rspi";
+                       reg = <0x0 0x12800800 0x0 0x400>;
+                       interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 504 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 505 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "idle", "error", "end", "rx", "tx";
+                       clocks = <&cpg CPG_MOD 0x5a>,
+                                <&cpg CPG_MOD 0x5b>,
+                                <&cpg CPG_MOD 0x5c>;
+                       clock-names = "pclk", "pclk_sfr", "tclk";
+                       resets = <&cpg 0x7f>, <&cpg 0x80>;
+                       reset-names = "presetn", "tresetn";
+                       dmas = <&dmac0 0x4490>, <&dmac0 0x4491>,
+                              <&dmac1 0x4490>, <&dmac1 0x4491>,
+                              <&dmac2 0x4490>, <&dmac2 0x4491>,
+                              <&dmac3 0x4490>, <&dmac3 0x4491>,
+                              <&dmac4 0x4490>, <&dmac4 0x4491>;
+                       dma-names = "rx", "tx", "rx", "tx", "rx", "tx",
+                                   "rx", "tx", "rx", "tx";
+                       power-domains = <&cpg>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                rsci0: serial@12800c00 {
                        compatible = "renesas,r9a09g047-rsci";
                        reg = <0 0x12800c00 0 0x400>;