]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: sm8250: correct dynamic power coefficients
authorVincent Guittot <vincent.guittot@linaro.org>
Thu, 15 Jun 2023 15:48:52 +0000 (17:48 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 19 Sep 2023 10:22:35 +0000 (12:22 +0200)
[ Upstream commit 775a5283c25d160b2a1359018c447bc518096547 ]

sm8250 faces the same problem with its Energy Model as sdm845. The energy
cost of LITTLE cores is reported to be higher than medium or big cores

EM computes the energy with formula:

energy = OPP's cost / maximum cpu capacity * utilization

On v6.4-rc6 we have:
max capacity of CPU0 = 284
capacity of CPU0's OPP(1612800 Hz) = 253
cost of CPU0's OPP(1612800 Hz) = 191704

max capacity of CPU4 = 871
capacity of CPU4's OPP(710400 Hz) = 255
cost of CPU4's OPP(710400 Hz) = 343217

Both OPPs have almost the same compute capacity but the estimated energy
per unit of utilization will be estimated to:

energy CPU0 = 191704 / 284 * 1 = 675
energy CPU4 = 343217 / 871 * 1 = 394

EM estimates that little CPU0 will consume 71% more than medium CPU4 for
the same compute capacity. According to [1], little consumes 25% less than
medium core for Coremark benchmark at those OPPs for the same duration.

Set the dynamic-power-coefficient of CPU0-3 to 105 to fix the energy model
for little CPUs.

[1] https://github.com/kdrag0n/freqbench/tree/master/results/sm8250/k30s

Fixes: 6aabed5526ee ("arm64: dts: qcom: sm8250: Add CPU capacities and energy model")
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Link: https://lore.kernel.org/r/20230615154852.130076-1-vincent.guittot@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/qcom/sm8250.dtsi

index 181e32b8a272896ec4f7a1db266ae1846cb278ba..005e75dc6919e86ec825c0f96ece89090600c8ce 100644 (file)
@@ -97,7 +97,7 @@
                        reg = <0x0 0x0>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <448>;
-                       dynamic-power-coefficient = <205>;
+                       dynamic-power-coefficient = <105>;
                        next-level-cache = <&L2_0>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
                        reg = <0x0 0x100>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <448>;
-                       dynamic-power-coefficient = <205>;
+                       dynamic-power-coefficient = <105>;
                        next-level-cache = <&L2_100>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
                        reg = <0x0 0x200>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <448>;
-                       dynamic-power-coefficient = <205>;
+                       dynamic-power-coefficient = <105>;
                        next-level-cache = <&L2_200>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
                        reg = <0x0 0x300>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <448>;
-                       dynamic-power-coefficient = <205>;
+                       dynamic-power-coefficient = <105>;
                        next-level-cache = <&L2_300>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;