]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: mediatek: mt8395-nio-12l: Prepare MIPI DSI port
authorJulien Massot <julien.massot@collabora.com>
Tue, 4 Mar 2025 14:01:55 +0000 (15:01 +0100)
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Thu, 6 Mar 2025 09:53:07 +0000 (10:53 +0100)
This board can use a MIPI-DSI panel on the DSI0 connector: in
preparation for adding an overlay for the Radxa Display 8HD,
add the backlight, and some definitions for pins available
through the DSI0 port.

Signed-off-by: Julien Massot <julien.massot@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250304-radxa-panel-overlay-v2-1-3ee6797d3f86@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts

index 7184dc99296c7f5d749c7e6d378722677970b3b7..1c922e98441a1aadf0aa3cdd76583a70401a1fa3 100644 (file)
                reg = <0 0x40000000 0x1 0x0>;
        };
 
+       backlight: backlight {
+               compatible = "pwm-backlight";
+               brightness-levels = <0 1023>;
+               default-brightness-level = <576>;
+               enable-gpios = <&pio 107 GPIO_ACTIVE_HIGH>;
+               num-interpolated-steps = <1023>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&dsi0_backlight_pins>;
+               pwms = <&disp_pwm0 0 500000>;
+               status = "disabled";
+       };
+
        wifi_vreg: regulator-wifi-3v3-en {
                compatible = "regulator-fixed";
                regulator-name = "wifi_3v3_en";
 &pio {
        mediatek,rsel-resistance-in-si-unit;
 
+       dsi0_backlight_pins: dsi0-backlight-pins {
+               pins-backlight-en {
+                       pinmux = <PINMUX_GPIO107__FUNC_GPIO107>;
+                       output-high;
+               };
+       };
+
        eth_default_pins: eth-default-pins {
                pins-cc {
                        pinmux = <PINMUX_GPIO85__FUNC_GBE_TXC>,
                };
        };
 
+       panel_default_pins: panel-pins {
+               pins-rst {
+                       pinmux = <PINMUX_GPIO108__FUNC_GPIO108>;
+                       bias-pull-up;
+               };
+       };
+
        pcie0_default_pins: pcie0-default-pins {
                pins-bus {
                        pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
                };
        };
 
+       pwm0_default_pins: pwm0-pins {
+               pins-disp-pwm {
+                       pinmux = <PINMUX_GPIO97__FUNC_DISP_PWM0>;
+               };
+       };
+
        spi1_pins: spi1-default-pins {
                pins-bus {
                        pinmux = <PINMUX_GPIO136__FUNC_SPIM1_CSB>,
                };
        };
 
+       touch_pins: touch-pins {
+               pins-touch-int {
+                       pinmux = <PINMUX_GPIO132__FUNC_GPIO132>;
+                       input-enable;
+                       bias-disable;
+               };
+
+               pins-touch-rst {
+                       pinmux = <PINMUX_GPIO133__FUNC_GPIO133>;
+                       output-high;
+               };
+       };
+
        uart0_pins: uart0-pins {
                pins-bus {
                        pinmux = <PINMUX_GPIO98__FUNC_UTXD0>,