x86: correct and improve "*vec_dupv2di"

The input constraint for the %vmovddup alternative was wrong, as the
upper 16 XMM registers require AVX512VL to be used with this insn. To
compensate, introduce a new alternative permitting all 32 registers, by
broadcasting to the full 512 bits in that case if AVX512VL is not
available.

gcc/

	* config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
	constraint. Add new AVX512F alternative.

gcc/testsuite/

	* gcc.target/i386/avx512f-dupv2di.c: New test.

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 87570357db6e16fbc2274d7d84c4635ad1bc5a7b..b99becba516024d2a3d0b8d6fae482b6595753e4 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -26162,19 +26162,35 @@
           (symbol_ref "true")))])
 
 (define_insn "*vec_dupv2di"
-  [(set (match_operand:V2DI 0 "register_operand"     "=x,v,v,x")
+  [(set (match_operand:V2DI 0 "register_operand"     "=x,v,v,v,x")
        (vec_duplicate:V2DI
-         (match_operand:DI 1 "nonimmediate_operand" " 0,Yv,vm,0")))]
+         (match_operand:DI 1 "nonimmediate_operand" " 0,Yv,vm,Yvm,0")))]
   "TARGET_SSE"
   "@
    punpcklqdq\t%0, %0
    vpunpcklqdq\t{%d1, %0|%0, %d1}
+   * return TARGET_AVX512VL ? \"vpbroadcastq\t{%1, %0|%0, %1}\" : \"vpbroadcastq\t{%1, %g0|%g0, %1}\";
    %vmovddup\t{%1, %0|%0, %1}
    movlhps\t%0, %0"
-  [(set_attr "isa" "sse2_noavx,avx,sse3,noavx")
-   (set_attr "type" "sselog1,sselog1,sselog1,ssemov")
-   (set_attr "prefix" "orig,maybe_evex,maybe_vex,orig")
-   (set_attr "mode" "TI,TI,DF,V4SF")])
+  [(set_attr "isa" "sse2_noavx,avx,avx512f,sse3,noavx")
+   (set_attr "type" "sselog1,sselog1,ssemov,sselog1,ssemov")
+   (set_attr "prefix" "orig,maybe_evex,evex,maybe_vex,orig")
+   (set (attr "mode")
+       (cond [(and (eq_attr "alternative" "2")
+                   (match_test "!TARGET_AVX512VL"))
+                (const_string "XI")
+              (eq_attr "alternative" "3")
+                (const_string "DF")
+              (eq_attr "alternative" "4")
+                (const_string "V4SF")
+             ]
+             (const_string "TI")))
+   (set (attr "enabled")
+       (if_then_else
+         (eq_attr "alternative" "2")
+         (symbol_ref "TARGET_AVX512VL
+                      || (TARGET_AVX512F && !TARGET_PREFER_AVX256)")
+         (const_string "*")))])
 
 (define_insn "avx2_vbroadcasti128_<mode>"
   [(set (match_operand:VI_256 0 "register_operand" "=x,v,v")

diff --git a/gcc/testsuite/gcc.target/i386/avx512f-dupv2di.c b/gcc/testsuite/gcc.target/i386/avx512f-dupv2di.c
new file mode 100644 (file)
index 0000000..d8d9609
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-dupv2di.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mavx512f -mno-avx512vl -O2" } */
+/* { dg-final { scan-assembler-not "vmovddup\[^\n\]*%xmm16" } } */
+
+typedef long long __attribute__ ((vector_size (16))) v2di;
+
+v2di bcst (long long ll)
+{
+  register long long x asm ("xmm16") = ll;
+
+  asm ("" : "+v" (x));
+  return (v2di) {x, x};
+}